464 ram memory expansion?

[dawe]

I want to do some expansion memory (for bus). Uses the signal to RAMDIS forbidden operations with internal memory. But the scheme is 464 (http://www.cpcwiki.eu/index.php/File:Schaltplan_cpc_464.jpg) the only place where the signal is connected Allowed output of ic 74373, which separates OUT_DATA_RAM -> DATA_BUS. That's ok, but what write to the internal memory is performed always?

The 6128 signal RAMDIS leads into HAL yet so maybe there is also guided strictly prohibited
CAS of 464 but could not see the signal RAMDIS banned entry into the internal memory.

[arnoldemu]

I want to do some expansion memory (for bus). Uses the signal to RAMDIS forbidden operations with internal memory. But the scheme is 464 (http://www.cpcwiki.eu/index.php/File:Schaltplan_cpc_464.jpg) the only place where the signal is connected Allowed output of ic 74373, which separates OUT_DATA_RAM -> DATA_BUS. That's ok, but what write to the internal memory is performed always?

The 6128 signal RAMDIS leads into HAL yet so maybe there is also guided strictly prohibited
CAS of 464 but could not see the signal RAMDIS banned entry into the internal memory.

I am going to make a big guess here!
Someone else can tell me I am wrong.


I am guessing that writing to main ram *always* happens including with extra ram.
Perhaps it is done like this so ram is refreshed ok (ram is also refreshed by the action of the gate-array/crtc reading ram to generate the display).

The RAM will output the address the z80 wants to read *always*. The same value is also written back to main ram if MWE is enabled.
But the 74373 blocks the z80 from seeing this value, it doesn't come to the z80 databus.

The RAMDIS is only there to block the Z80 from reading the internal data in the ram.

So for your external ram:

- You need to see memory write and store it into your ram
- When ram read is active, you set RAMDIS, z80 databus is now yours. You give your databyte to read.

All is ok.

Does this seem a good answer or is it just wrong?

[arnoldemu]

115 seems to be databus *IN* to the ram, /244EN allows it in, allowed for I/O and for z80 writes
114 seems to be databus *OUT* from the ram.
But I'm not sure.

[dawe]

I thought the DI of RAM is connected directly to the data bus. I have to be at home to look. But equally it does not solve the signal RAMDIS would be called RAMrdDIS.

[arnoldemu]

I thought the DI of RAM is connected directly to the data bus. I have to be at home to look. But equally it does not solve the signal RAMDIS would be called RAMrdDIS.

please try to keep to dk'tronics standard then a lot of programs will use your ram automatically.

http://www.cpcwiki.eu/index.php/Dk%27tronics_memory_expansion

(same port for selecting ram banks).
You do not need to implement all selections, 4,5,6,7 are enough.

[Bryce]

To fully explain how it works would take forever (and this posting would end up rivaling some of MacDeaths best works), so I'll keep it as short as possible with a couple of pointers and a few links that might help you:

First of all the RAMDIS alone doesn't disable the RAM. The RAM bank management is being done by the Gate-array AND the PAL.
The bank being addressed has to be set in the Gate array using register 3. More info here: http://www.cpcwiki.eu/index.php/Standard_Memory_Expansions#Simple_64K_Expansion_.28CPC6128-style.29  and here: http://www.cpcwiki.eu/index.php/Gate_Array#What_does_it_do.3F

In a 6128 the PAL needs to know that external RAM is being used, so you send it a RAMDIS signal, but in a 464 this signal is only being used to inhibit the read cycle, the write cycle is inhibited by the fact that the gate array doesn't set /we if the selected bank is not internal.

A 464 has banks 0-3 and an expansion adds extra banks 4-7 for a total of 8 banks, but the expansion needs to carry out the functions that a 6128 PAL does. Expansions on a 128K CPC simply replace the second 64K of the 6128 (banks 4-7) and swaps any further RAM in and out of these banks. This is also the reason why most DIY RAM expansions are 6128 only. 464 expansions are more complicated.

DK'Tronics system: http://www.cpcwiki.eu/imgs/8/8c/256K_RAM_Expansions_DKtronics_Manual.pdf

Now you're probably even more confused

Bryce.

[dawe]

Of everything I watched - in theory I understand it.
But according to the scheme will always generated signals RAS, CAS, WE for internal memory even though the active signal RAMDIS. This means that any registration (in memory) is performed and always in the internal memory.
If I'm wrong what prohibits some of the signals RAS, CAS, WE?

Theoretically:
If I have an external 64K memory and logic circuit equivalent of HAL 6128, I have set the ram config 4 (http://www.cpcwiki.eu/index.php/Gate_Array#Register_3_-_RAM_Banking) and by writing to the address 4000h - write is done both internally and to external memory? If not what blocks the internal memory - still do not understand.

[dawe]

Another way:
if you want 464 external modules to extend the 128k compatible with 6128 well I have to edit 464 internally as follows:

do not know how to insert picture

original:
Internal_RAM_WR = GateArray_MWE

new:
Internal_RAM_WR = GateArray_MWE OR RAMDIS

?

[Bryce]

If the address being read is 4000h (or above), then A14 and/or A15 = 1.  Both of these address signals are being fed into the gate array (pins 20 and 21), then the Gate array isn't going to set /WE when it knows that you have chosen config 4 in Reg 3, so RAM_4 must be external.

Bryce.

Edit: under the box you type the message into is a text "+ Atachments and other options" click on this to attach pictures.

[dawe]

>If the address being read is 4000 (or above), then A14 and/or A15 = 1.  Both of these address signals are being fed into the >gate array (pins 20 and 21), then the CRTC isn't going to set /WE when it knows that you have chosen config 4 in Reg 3, so >RAM_4 must be external.

And how GateArray know that I am currently connected external memory to the bus?

[arnoldemu]

I think we have some confusion here:

* PAL controls ram configuration in 6128 only.
* Gate-Array generates /MWE (connected to internal RAM only, no connection to RAMDIS on both 464 AND 6128)
* RAMDIS connects to PAL on 6128, but only to control which RAM has CAS enabled or not.
* RAMDIS connects near /244EN on 464.
* ram configs are like this: OUT &7F00,&C0 or OUT &7F00,&C1 or OUT &7F00,&C2 etc.
&C4, &C5, &C6,&C7 should connect external ram to &4000-&7fff.

For 464, I am with dawe here. I still think IC115 and IC114 are the important thing here.
But remember 244 also says if crtc/gate-array reads ram (for video) or if z80 sees ram.

(Ignore CRTC it only provides addresses for gate-array to read to generate video, and indirectly refresh internal ram, this is not important here)

[arnoldemu]

It would be good to put an oscilloscope on the signals to see what they are doing.

[dawe]

I have a feeling I'm talking about the goat and you're talking about car.

I will try to explore.

[Bryce]

Sorry the CRTC was a typo. I corrected that.

Ok. here is another way of looking at it:

Lets assume that you have just entered &7F00,&C4, this means:

0000-3FFF = RAM_0  (When anything here is addressed A15=0 A14=0)
4000-7FFF = RAM_4  (When anything here is addressed A15=0 A14=1)
8000-BFFF = RAM_2  (When anything here is addressed A15=1 A14=0)
C000-FFFF = RAM_3  (When anything here is addressed A15=1 A14=1)

Now lets say you want to write to 2FF0h

The gate array then calculates = Ok, someone wants to write to RAM, A15=0, A14=0 so that must be internal = Set /WE and /244EN

Now write to 4E00h

The gate array then calculates = Ok, someone wants to write to RAM, A15=0, A14=1 so that must be external = Don't set /WE or /244EN

Now write to CE00h

The gate array then calculates = Ok, someone wants to write to RAM, A15=1, A14=1 so that must be internal = Set /WE and /244EN

During read cycles RAMDIS can inhibit the RAM being read, but during write cycles it's being done by the gate array.

On the 6128 it does almost the same, only it tells the PAL which set of RAM IC's to send the CAS signal to.

Bryce.

[arnoldemu]

I like your reasoning *but*.

selection c2, switches the entire ram to the extra ram.

0000-3FFF = RAM_7  (When anything here is addressed A15=0 A14=0)
4000-7FFF = RAM_6  (When anything here is addressed A15=0 A14=1)
8000-BFFF = RAM_5  (When anything here is addressed A15=1 A14=0)
C000-FFFF = RAM_4  (When anything here is addressed A15=1 A14=1)

so &0000-&ffff is all from extra ram.

.... Gate-Array can't know without RAMDIS

[Bryce]

Why does that go against my reasoning? The example was only for 7F00 = C4, if C2 is selected, then everything is external and they never get set. Whether they get set or not depends on the settings in 7F00.

ie: if 7F00 = C4 then 00=internal 01=external 10=internal 11=internal
     if 7F00 = C2 then 00=external 01=external 10=external 11=external

As far as I know it has to be done this way, so that the CRTC can always read from the internal RAM no matter what the hardware configuration is.

Bryce.

[arnoldemu]

Well, the Gate-Array in the 464/6128 doesn't know about ram configuraton. It doesn't actually have a register 3.

The PAL in the 6128 is at almost the same I/O address than the Gate-Array, and hides like it was a register in the Gate-Array.
(The actual I/O decoding does different between PAL and Gate-Array. Pal decodes on a15=0 only, gate-array decodes on a15=0, a14=1).

So the Gate-Array itself doesn't know the ram configuration you select.

Only the PAL and you're hardware know.

[Bryce]

Really? Now you've got me confused (not all that difficult to do actually ). But A14 goes to the PAL too. What makes you think it's not being decoded?

That would also mean that writing the C2 / C4 values etc would work if you wrote them to any address as long as a15=0 ie: any value lower than 7FFF ?

Bryce.

[arnoldemu]

Really? Now you've got me confused (not all that difficult to do actually ). But A14 goes to the PAL too. What makes you think it's not being decoded?

Bryce.

I added more confusion, I will try to solve that.

PAL does 2 things.

1. it recognises an I/O write, where A14=0, /IOWR, D7 AND D6 are 1. (7F00 port effectively).
(I can check if it also decodes A15 in the port address, but I don't think it does)

2. it stores the value you write (D2,D1,D0) = the selection (C1..C7)

3. it takes A14/A15 with NCAS, and outputs A14OUT and A15OUT, CAS0, CAS1.

Gate-Array:

http://www.cpctech.org.uk/docs/manual/s158ap12.pdf

"F. Video Gate Array"

bit 7 = bit 6 = 1 -> Reserved.

[Bryce]

Cool. Today I learnt something new

Now I'm off to the pub and will have probably forgotten it all again by tomorrow

Bryce.

[dawe]

I will try the original question again:

External hardware can affect CPC464 (disable) write into internal memory?
How then can run an external memory of 464?

OT: Measurements
DI pins internal ram are connected to the processor data bus
DO pins internal ram are connected to the GateArray data bus

[Bryce]

Ok. The easiest way to find out, is to try it out on real hardware. I can't do it now, but I have a 464 and a DK'Tronics 64K expansion here, so when I get a chance I will try this: I will write something to an internal address, then swap banks with an external one, write something else to the same address and then swap back and read the address. If the internal memory is always written to, then the result will be the second value, if not it will be the first value.

I already know the answer, but I'll let you know anyhow.

Bryce.

[arnoldemu]

I have this book "Anatomy of the CPCs".

http://www.cpcwiki.eu/index.php/The_Anatomy_of_the_CPC%27s

It is the English version of "CPC Intern" a German book.

http://www.cpcwiki.eu/index.php/CPC_664_/_6128_Intern

This may have the information.

This book would also help:

http://www.cpcwiki.eu/index.php/Understanding_and_Expanding_your_Amstrad_CPC464-664/6128

But I don't know if a PDF exists.

I will look in my book and see what it says about the ram addressing and ramdis.

[Bryce]

These books tend to explain the signals at the expansion port, but not what the internal (non-connectable) inter-connections do. Which is a pity, but normally all you need to build an extension.

Bryce.

[arnoldemu]

I have this book "Anatomy of the CPCs".

http://www.cpcwiki.eu/index.php/The_Anatomy_of_the_CPC%27s

Sadly this book was no use on this subject.

It is comparable to a Speccy port. 

It would be more useful as toilet paper. 

CPC Intern which it is translated from is much better, but still I don't think it describes this information.