Author Topic: Aleste 520EX  (Read 5390 times)

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Offline nocash

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Aleste 520EX
« on: 18:48, 03 February 10 »
Topic for the CPC6128 clone Aleste 520EX,

http://cpcwiki.eu/index.php/Aleste_520EX

> arnoldemu: One part of the annotated schematic describes the "Gate
> Array 3". This is actually the Aleste's "extport" located at #FABF

Oh yeah, right, the D32 chip (sheet 1) isn't Gate Array 3, I'll fix that soon, thanks.

The equivalent to Gate Array 3... would be then D67 (sheet 2)... right?
Haven't yet understood what the "A" and "B" signals do there.

> can we have a clean version of the Aleste schematics and then a
> document which describes the operation of the parts?
One without the annotations? I think they are damn useful. But if you don't want them: Get the original schematics from aleste520.narod.ru.

Or use "Edit Palette" in the annotated ones and change blue to white, so the new text layer vanishes. The black layer is exactly the same as in the original schematics (except, I've moved some text to make room for adding the comments, but that changes keep the original context intact) (the only thing that I've CHANGED is the K555LN2 part number, D76, sheet3, in the original schematic the "N" was distorted and looked more like a bold "K" or an clipped "R").

> The aleste520.narod.ru has a document describing how the hardware
> works and describes the ICs used for that part.

Which one do you mean?

I've seen at least two relevant docs there. The english "programming.htm" gave some hints on the I/O ports, though it's unclear in some places. NB. an edited version is here,
http://cpcwiki.eu/imgs/5/5c/Aleste-Programming-Manual-English.txt
I've kept the original text in there, no typos fixed, only replaced things like cyrillic "A" in "Port A" by latin "A", so it can be viewed with western fonts.

There's also a russian file "schematic.htm" it seems to describe the ICs in detail (at least there's a lot text saying "D32", "D67", etc., I couldn't translate the rest of the text).

Offline arnoldemu

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Re: Aleste 520EX
« Reply #1 on: 19:14, 03 February 10 »
Topic for the CPC6128 clone Aleste 520EX,

http://cpcwiki.eu/index.php/Aleste_520EX

> arnoldemu: One part of the annotated schematic describes the "Gate
> Array 3". This is actually the Aleste's "extport" located at #FABF

Oh yeah, right, the D32 chip (sheet 1) isn't Gate Array 3, I'll fix that soon, thanks.
np.

I think it is good to discuss the schematics because hopefully together we can understand it better.


The equivalent to Gate Array 3... would be then D67 (sheet 2)... right?
Haven't yet understood what the "A" and "B" signals do there.
same here.

This is what I understand:

Gate Array 3 originates from MAPER on D54. D62 also comes into play here but I think it acts as a "passthrough" or buffer in this case.
After d62 it goes into d87 and d88. M4 is effectively which 256KB bank to choose.  I am not sure but it may get blocked in cpc mode because the cpc can't access more than 256KB :(
Finally this goes into d28 to generate the final outputs.

'A' and 'B' are generated from D26.

the d8 prom has the mappings for the blocks. here you can see both cpc and msx style configurations. The data is arranged in groups of 4 bytes, with a14,a15 mapping into them. with the cpc configs you can directly see the dk'tronics style configs we know. for the msx configs it repeats the same byte, but I think the mapping into this prom is different in msx mapper mode.

mapmod switches between cpc and msx configurations and changes where in the prom the data is fetched.

The mapper can be read from D89.

What I am not sure about is if you choose a ram config in cpc mode (e.g. just write to 7fxx), is this written to all the mapper registers (7cxx, 7dxx,7exx,7fxx) at the same time? The ROM itself does not help because it runs regardless of how you handle this situation.

d62 also controls how the rom enables (prom0/prom1 on d55) are converted into actual rom enables. But I don't understand exactly what is going on here either :( )



> can we have a clean version of the Aleste schematics and then a
> document which describes the operation of the parts?
One without the annotations? I think they are damn useful. But if you don't want them: Get the original schematics from aleste520.narod.ru.
the annotations are useful, but I would prefer them in a seperate doc, but that is my preference.

> The aleste520.narod.ru has a document describing how the hardware
> works and describes the ICs used for that part.

Which one do you mean?

I've seen at least two relevant docs there. The english "programming.htm" gave some hints on the I/O ports, though it's unclear in some places. NB. an edited version is here,
http://cpcwiki.eu/imgs/5/5c/Aleste-Programming-Manual-English.txt
I've kept the original text in there, no typos fixed, only replaced things like cyrillic "A" in "Port A" by latin "A", so it can be viewed with western fonts.

There's also a russian file "schematic.htm" it seems to describe the ICs in detail (at least there's a lot text saying "D32", "D67", etc., I couldn't translate the rest of the text).
I mean the second schematic.htm.
This is a reasonable description of the ICs. I managed to decode it all but had to copy and paste final bit into the translation engine to get it to come out.

It still doesn't describe how the interrupts are generated.

It seems the interrupts are based on a count of 26. d66 (with sint input) keeps track of if there are 2 in a row and if there are it triggers an interrupt so that we get an interrupt every 52 lines. But when an interrupt is acknowledged, I think it prevents the next from occuring within 26 lines. So this is again different to the cpc.

I think this is the only source of interrupts. the timer is used to clock the serial and to trigger the hardware to change colours through d52 and this is triggered by cursor from the crtc.

« Last Edit: 19:30, 03 February 10 by arnoldemu »
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Offline nocash

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Re: Aleste 520EX
« Reply #2 on: 20:34, 03 February 10 »
> Gate Array 3 originates from MAPER on D54. D62 also comes into play...

Uh. I need to eat something before I try to think of that stuff.

> the annotations are useful, but I would prefer them in
> a seperate doc, but that is my preference.
But then one need to switch between looking at the schematic to at the doc, and soon loose track of where one was looking at :-) of course, a separate doc is needed, too. Like the "Technical" section you started.

NB. I'd be careful about the term "MSX". A few features of the Aleste are somewhat inspired by the MSX, eg. parts of the RAM banking works similar to "MSX mappers", though the MSX uses different I/O addresses, so altogether the Aleste has nothing to do with msx.

> 0   0   Pen index write (note 5)
> ...
> ...
> 5. If bit 3 is set, border is selected.
>   Otherwise bits 3..0 define the pen index.

Uh, that's one of the situations where I tend loosing track. Can't you put it into a single sentence, without note number whatever? Like:
  "0 0 Pen index write (If bit 3 is set, border is selected.
  Otherwise bits 3..0 define the pen index.)"
EDIT: Or better, "If bit 4 is set..."

> I mean the second schematic.htm... had to copy and paste
> final bit into the translation engine to get it to come out.

Would be nice if you upload it.

> #7CXX   %0xxxxxxx xxxxxxxx   Multiport (note 3)]

Shouldn't that be 7FXXh? And maybe call it "Multiport (aka Gate Array)", so one knows what it's all about.

Oh, one more nasty thing. The "gamebios" page on the russian webpage, it says something about turbo upgrade or so. Could that mean they made a mod for running the cpu at 8MHz? The "startup" manual also contains a small schematic, not sure if it's an add-on / mod. Or maybe it's just an excerpt from the original schematic, didn't gave it closer look yet.

> bit 1 changes the frequencies inside the aleste (uses
> 13.333Mhz base clock) but also increases the clock to
> the crtc to approx 1.5Mhz.

Hmmmm, yes, looks like so in the schematic.
  Drops the CPU clock from 4MHz to 3.3MHz, and
  Drops the dotclock from 320 pixels to 256 pixels, and
  Increases the vram clock to double color depth
is that correct?

Only problem is that "programming.htm" states that "320*200 pixels, 16 colors" can be used. Is that bogus? And actually means 256x200x16?
« Last Edit: 00:57, 04 February 10 by nocash »

Offline Cpcmaniaco

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Re: Aleste 520EX
« Reply #3 on: 22:53, 03 February 10 »
Here you can see more photos of the Aleste :

http://www.zonadepruebas.com/modules/smartsection/item.php?itemid=1076&keywords=aleste

This Aleste is from the collection of Deepfb, a big spanish collector.

Offline Ygdrazil

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Re: Aleste 520EX
« Reply #4 on: 00:03, 04 February 10 »
Pictures are really good!  :)

Can we put the pictures on the CPCWIKI?

/Ygdrazil

Here you can see more photos of the Aleste :

http://www.zonadepruebas.com/modules/smartsection/item.php?itemid=1076&keywords=aleste

This Aleste is from the collection of Deepfb, a big spanish collector.

Offline nocash

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Re: Aleste 520EX
« Reply #5 on: 00:44, 04 February 10 »
> Pictures are really good! 
Yup! The mainboard pics have better resolution.
The magicsound board, too. Though that pics are funny, since about half of the chipset is missing.

> Can we put the pictures on the CPCWIKI?
Uh, yeah, maybe one should ask. I've put them there straight now. Added credits where they came from, so I hope it's okay.

Offline Ygdrazil

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Re: Aleste 520EX
« Reply #6 on: 00:50, 04 February 10 »
Excellent  :D

> Pictures are really good! 
Yup! The mainboard pics have better resolution.
The magicsound board, too. Though that pics are funny, since about half of the chipset is missing.

> Can we put the pictures on the CPCWIKI?
Uh, yeah, maybe one should ask. I've put them there straight now. Added credits where they came from, so I hope it's okay.

Offline arnoldemu

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Re: Aleste 520EX
« Reply #7 on: 11:59, 04 February 10 »

> the annotations are useful, but I would prefer them in
> a seperate doc, but that is my preference.
But then one need to switch between looking at the schematic to at the doc, and soon loose track of where one was looking at :-) of course, a separate doc is needed, too. Like the "Technical" section you started.
Well I had a second look at the schematics that you did, and I accepted they are good.
I would also like the original schematics too there for reference. I know it is like duplication but at the moment your annotations are still a work in progress.

NB. I'd be careful about the term "MSX". A few features of the Aleste are somewhat inspired by the MSX, eg. parts of the RAM banking works similar to "MSX mappers", though the MSX uses different I/O addresses, so altogether the Aleste has nothing to do with msx.
ok. I used the same term as the original author. Maybe referring to it as RAM mapper would be best?
This seperates it from the cpc, but also does not link it to MSX?

> 0   0   Pen index write (note 5)
> ...
> ...
> 5. If bit 3 is set, border is selected.
>   Otherwise bits 3..0 define the pen index.

Uh, that's one of the situations where I tend loosing track. Can't you put it into a single sentence, without note number whatever? Like:
  "0 0 Pen index write (If bit 3 is set, border is selected.
  Otherwise bits 3..0 define the pen index.)"
EDIT: Or better, "If bit 4 is set..."
Ooops yes I made a mistake with bit 4.

Is it ok if I put this info into a table?

> I mean the second schematic.htm... had to copy and paste
> final bit into the translation engine to get it to come out.

Would be nice if you upload it.
ok will do

> #7CXX   %0xxxxxxx xxxxxxxx   Multiport (note 3)]

Shouldn't that be 7FXXh? And maybe call it "Multiport (aka Gate Array)", so one knows what it's all about.

yes. thankyou for pointing out that mistake.
I don't really want to call it "Gate Array" because it is not the gate array.
But definitely calling it something which references the gate-array would be best.
Maybe Aleste "Gate Array"?

Oh, one more nasty thing. The "gamebios" page on the russian webpage, it says something about turbo upgrade or so. Could that mean they made a mod for running the cpu at 8MHz? The "startup" manual also contains a small schematic, not sure if it's an add-on / mod. Or maybe it's just an excerpt from the original schematic, didn't gave it closer look yet.
Yes I agree.
But the documentation is not clear.

It seems to say there is a 8Mhz upgrade but you must contact Patisonic for the schematic. The schematic above seems to relate to another Patisonic computer the 48ST (?) which is a 48K Spectrum clone.

I don't fully understand this myself.
It seems this information may be lost.. maybe Bryce would look at the schematics and suggest a possible solution here and we could mark it as unofficial?

> bit 1 changes the frequencies inside the aleste (uses
> 13.333Mhz base clock) but also increases the clock to
> the crtc to approx 1.5Mhz.

Hmmmm, yes, looks like so in the schematic.
  Drops the CPU clock from 4MHz to 3.3MHz, and
  Drops the dotclock from 320 pixels to 256 pixels, and
  Increases the vram clock to double color depth
is that correct?
I think so.

D38 is like a Hz translation. It takes HIGHT as an input. This is derived from HIGHTX on D49 but I don't understand what it does here.

Then it controls D38 to swap.

CPC clocks at the top, Aleste at the bottom. But really this is not the full answer as you know because D37 outputs the clocks it uses.

So with a 16Mhz, it generates 8Mhz, 4Mhz, 2Mhz and 1Mhz. But with 13Mhz, it generates 6.4, 3.2, 1.6 and 0.8Mhz.
These go into D38 and control the other parts of the hardware. In addition HIGHT swaps the function of MA12 and MA10 comming from the CRTC. (This is passed into D24 to final control of mA8, but also HIGHTY is here too).

Looking at the clocks, CPU is getting 4Mhz/3.2Mhz, AY is getting 1Mhz/0.8Mhz, CRTC is getting 1Mhz/1.6Mhz. And the parameters programmed into the CRTC reflect this too (the values are 1.8 times bigger).

I am not sure about the dotclock.
The HSYNC will be shorter in the aleste, because the crtc is running faster. Maybe D65 translates it to make it longer.. but I am not sure.
The russian technical doc says it modifies the hsync width but I don't know how yet.

The mode is definitely programmed as 320x200 in the CRTC the horizontal displayed reflects this.
The difference is that the display hardware decodes it like mode 0. Like the cpc the hardware fetches 2 bytes at a time, but when HIGHTX is set, the crtc is running 1.6times faster, so is also fetching data faster.
What is more possible is that the pixel dimensions will be different. So if you compare 320x200x16 pixels and 320x200x4 (cpc) pixels then they will not be the same width.

Maybe the border is shorter.. this is something that is not clear.

I think HIGHTX enables the crtc to fetch 32k too.

Only problem is that "programming.htm" states that "320*200 pixels, 16 colors" can be used. Is that bogus? And actually means 256x200x16?
It really is 320x200 in 16 colours. But the docs also mention 256x200 and 320x212 I think.
I think HIGHTY has something to do with the other modes but I haven't found out yet.

When the Aleste is showing the boot screen, bit 1 and bit 0 of the mode register are set to 1. It is displaying a 320x200 with 16 colours screen. HIGHTX and HIGHTY are 1. MAPMOD is 1.

I didn't find yet where the hardware decodes the modes completely to tell it how to decode the pixels.
Do you think D50, D51, D52 and D53 are for this purpose?
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Offline Bryce

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Re: Aleste 520EX
« Reply #8 on: 12:19, 04 February 10 »
Hi All,
     I've never seen an Aleste 520EX, I don't speak Russian and I am not up to speed (Read: Haven't a clue) on russian Semi-conductors, but let me know what I should look at and I'll see if I can make any sense of the hardware.

Bryce.

Offline arnoldemu

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Re: Aleste 520EX
« Reply #9 on: 13:30, 04 February 10 »
Hi All,
     I've never seen an Aleste 520EX, I don't speak Russian and I am not up to speed (Read: Haven't a clue) on russian Semi-conductors, but let me know what I should look at and I'll see if I can make any sense of the hardware.

Bryce.
Cool.

This is the google translation of the startup document referring to this:

"On the introduction of the regime "turbo"

We have a scheme on two chips, (TM2, and LA3) allows you to enter this mode. But for reliable operation of computer
in this mode requires the processor Z80H or TOSHIBA TMPZ84C00AP-8.

In this mode will not boot some Games in mode AMSTRAD due to the reduced waiting time at positioning
head drive. This mode is useful mainly to those who wrote fairly large program for reduce compile time.
If you want to do this option, contact the firm PATISONIC."

LA3 is mentioned on D41 and D75. TM2 is D77,D66,D40,D57.

All of these are on page 1 of the schematics.

CLK on D39 is the clock that currently goes to cpu.
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Offline Bryce

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Re: Aleste 520EX
« Reply #10 on: 14:50, 04 February 10 »
Hi,
    just took a really quick look at the schematic (will take a proper look later).... question to nocash... I have no experience of these components, I assume you have a conversion table for the Russia to standard part No.s, are all parts pinout compatible? Just want to be sure before I start looking deeper into the schematics.

From first glance it looks like a really interesting computer. Where can I get one :)

Bryce.

Offline nocash

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Re: Aleste 520EX
« Reply #11 on: 16:25, 04 February 10 »
> I would also like the original schematics too there for reference.
Okay, added them (in non-gallery form) below of the edited schematics.

> Maybe referring to it as RAM mapper would be best?
Perfect. Also makes clear that it doesn't affect ROM.

> Is it ok if I put this info into a table?
Yes. Only the note 1 note 2 note 3 ... note 10 stuff was soooo confusing. I've rearranged it a litte, replaced the note numbers by section headlines.

> Maybe Aleste "Gate Array"?
Yeah. Or customized gate array. And since patisonic called it multiport, that name should be mentioned, too. Just in case somebody read about the multiport, and wonders what it is about.

> The schematic above seems to relate to another Patisonic computer
> the 48ST (?) which is a 48K Spectrum clone.
Whoops :-)

> But with 13Mhz, it generates 6.4, 3.2, 1.6 and 0.8Mhz.
Yup. But why is 13/2=6.4 ?
I think the 13MHz value (in the schematic) is a rounded value.
The component map says 13.333MHz.
Though... looking at the new photo of the mainboard, it looks like E1EE1 :-)
Or, 13313 if you turn it top-down.
Plus, one of patisonics htm files, listed 14MHz (3.5MHz cpu clock) or so.

My mail-order catalog for electronic components doesn't list either 13.000, nor 13.333, nor 13.313 crytals. So no idea if/which values are manufactured.

Anyways, I'd bet it's something near 13.3 MHz.

> The mode is definitely programmed as 320x200 in the CRTC
> the horizontal displayed reflects this.
> Maybe the border is shorter.. this is something that is not clear.
Probably yes. Horizontally stretched picture, with smaller border. Haven't looked at the bios/software yet. If Horizontal Total is smaller than usually - that would confirm it.

> you have a conversion table for the Russia to standard part No.s
Yup, there are at least 1-2 good conversion lists in the internet, don't remember where I found them. Just enter a handful of russian (and if known, corresponding western) part numbers in a search engine. Some more exotic chips aren't listed there though, for example, the western part number for the RTC was extracted from patisonic's programming.htm file.

> are all parts pinout compatible?
As far as I know, yes. Haven't compared ALL fivehundred-or-so pins :-)
« Last Edit: 16:27, 04 February 10 by nocash »

Offline nocash

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Re: Aleste 520EX
« Reply #12 on: 16:39, 04 February 10 »
PS. just wondering, you HAVE seen the edited schematics with western part numbers, don't you?

Offline arnoldemu

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Re: Aleste 520EX
« Reply #13 on: 17:10, 04 February 10 »
> I would also like the original schematics too there for reference.
Okay, added them (in non-gallery form) below of the edited schematics.
thanks. Perfect

> Maybe referring to it as RAM mapper would be best?
Perfect. Also makes clear that it doesn't affect ROM.
good. I'm not sure i've updated the page yet to reflect this.

> Is it ok if I put this info into a table?
Yes. Only the note 1 note 2 note 3 ... note 10 stuff was soooo confusing. I've rearranged it a litte, replaced the note numbers by section headlines.
Yes it is better

> Maybe Aleste "Gate Array"?
Yeah. Or customized gate array. And since patisonic called it multiport, that name should be mentioned, too. Just in case somebody read about the multiport, and wonders what it is about.
The only thing i was thinking was that "Gate Array" implies one IC with programmable gates?
And the Aleste is not built like that. Calling it "Gate Array" in quotes was to link it with the cpc and say it has similar functionality. Not sure what the best name would be.

> But with 13Mhz, it generates 6.4, 3.2, 1.6 and 0.8Mhz.
Yup. But why is 13/2=6.4 ?
I think the 13MHz value (in the schematic) is a rounded value.
The component map says 13.333MHz.
Though... looking at the new photo of the mainboard, it looks like E1EE1 :-)
Or, 13313 if you turn it top-down.
Plus, one of patisonics htm files, listed 14MHz (3.5MHz cpu clock) or so.

My mail-order catalog for electronic components doesn't list either 13.000, nor 13.333, nor 13.313 crytals. So no idea if/which values are manufactured.

Anyways, I'd bet it's something near 13.3 MHz.
Yes agreed. My mistake. The schematic has "13Mhz" written on it so I assumed this was what it was.
13.3333Mhz is more likely but also so is 14Mhz.
It's not easy to see.. maybe one of the Spanish guys can take a closer picture to help identify.

> The mode is definitely programmed as 320x200 in the CRTC
> the horizontal displayed reflects this.
> Maybe the border is shorter.. this is something that is not clear.
Probably yes. Horizontally stretched picture, with smaller border. Haven't looked at the bios/software yet. If Horizontal Total is smaller than usually - that would confirm it.
The BIOS writes Horizontal Total which is  80% larger and so is Horizontal displayed.

Vertical Sync and Horizontal Sync are the same values as on the CPC, but because of the crtc running faster it is likely to be a shorter pulse (for hsync)?

> are all parts pinout compatible?
As far as I know, yes. Haven't compared ALL fivehundred-or-so pins :-)
I challenge you to compare all 500 pins ;)
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Offline nocash

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Re: Aleste 520EX
« Reply #14 on: 21:17, 04 February 10 »
> The only thing i was thinking was that "Gate Array"
> implies one IC with programmable gates?
Don't know. I only know the term as "the thing in the cpc". And array of gates doesn't mean it's a single chip. If looks better in quotes, okay. Yup, having it linked to the CPC's Gate Array article is good.

> 13.3333Mhz is more likely but also so is 14Mhz. It's not easy to see..
> maybe one of the Spanish guys can take a closer picture to help identify.
The picture quality is near perfect. It's clearly 13313, isn't it? Which would be kHz, or put the missing dot in, and it's MHz. Hmmm, and 14MHz, that would be a msx-inspired value, makes sense in some way, but all other sources say 13.something. Maybe they originally wanted 14MHz, but couldn't buy some, or it was too fast for the CRTC or so.

> The BIOS writes Horizontal Total which is  80% larger and so is Horizontal displayed.
Okay, sure. It should be 100% larger (for the *2 doubled clock). If it's only 80% larger, then it confirms that the clock isn't doubled (only *1.6),  as we've already seen in the schematic.

So 320x200x16 is only a "fake" video mode, and it's actually 256x200x16 (concerning the pixel size). What I mean is, the known "really" supported modes seem to be only these:
  160x200x16  ;\
  320x200x4    ; standard CPC modes
  640x200x2    ;/
  256x200x16  ;\extra Aleste modes
  512x200x4    ;/
plus, one could mention (separated from above), that it does also do some trickery with the crtc register to adjust the picture/border size, like expanding 256x200 to 320-horizontally, or 212 vertically. But that's only a software feature, nothing hardware specific.

> Vertical Sync and Horizontal Sync are the same values as
> on the CPC, but because of the crtc running faster it is
> likely to be a shorter pulse (for hsync)?
The CRTC sync outputs are HY=vsync, HX=hsync.
And, yup, in the fast *1.6 mode, they are probably getting too short.

As far as I can see, that's handled in lower-left of sheet 1, and the "VDKEY" eprom outputs the improved/longer sync signals:
HY*=improved vsync (passed to PPI), and
SYNC should be improved vsync+hysnc mixed together (passed to monitor).

Haven't "disassembled" the content of "VDKEY" yet, but it seems to contain the timing signals for one frame (the connected eprom address counters are reset by HY=vsync).

> I challenge you to compare all 500 pins
Okay. Just started! I'd suggest everybody else in this forum does the same, too. And after being back hospital we can compare our results ;-)

Offline deepfb

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Re: Aleste 520EX
« Reply #15 on: 22:00, 04 February 10 »
Hi!

First of all, I can provide the original pictures attached to the zonadepruebas reference. I took all of them, and some more. If you want me to take pics of some particular part(s) of the board, please let me know which one(s).

Regarding the turbo upgrade, I sadly doesn't own it (yet ;-). According to Valery, it was aimed to speed up the MSX games, since some of them run really slow (King's Valley is playable, Vampire Killer hardly).

In the issue #03 of the 'Revista de Usuarios de Amstrad' (http://www.amstrad.es/downloads/revistausuariosamstrad3.rar) there's an inverview where I questioned Valery on his design; it's quite revealing on how the Aleste was conceived, built and marketed -but the text is only in spanish, sorry. I can translate the inverview to english if you're interested in it, although I don't know when -I'm very busy these days working on the preparations of the RetroMadrid fair.
Btw, my Aleste will be shown there (at RetroMadrid), so if you want to see it, take pictures, test its OS, compatibility, etc., you're more than welcome :-). We still have some room in our houses for foreign guests' accomodation, since only Nich, Macdeath and Cngsoft have expressed their intentions to come to cpcmaniaco's flat or to my house.
RetroMadrid will take place on Saturday 13th of March, at the facilities of the Universidad Complutense of Madrid (http://www.retromadrid.org/index.php?idioma=en :-)

Offline nocash

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Re: Aleste 520EX
« Reply #16 on: 22:57, 04 February 10 »
> First of all, I can provide the original pictures
> attached to the zonadepruebas reference.
Thanks! I am afraid we already stole them from there :-) Or do mean more original ones with better resolution or so?

> If you want me to take pics of some particular part(s)
The bottom side of the mainboard would be nice!
And, one thing I was wondering is if the "analog" and "digital" supply voltages are simply short-cut with each other (the four soldering points, seen at the right edge of the board).
NB. the Aleste *does* use a power-supply, doesn't it? Or does it run all by itself? :-) I couldn't find a power-supply connection on any of the photos.

> Regarding the turbo upgrade, I sadly doesn't own it (yet ;-).
Anyways, good to know that it exists. Do you know what it does exactly? Double clock with 8MHz instead 4MHz?

Offline nocash

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Re: Aleste 520EX
« Reply #17 on: 22:59, 04 February 10 »
PS. what's the story behind the Magic Sound board photos?
About a handful of important chips seem to be not installed on it.

Offline nocash

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Re: Aleste 520EX
« Reply #18 on: 23:25, 04 February 10 »
Just upload newer version of the schematics...
 renamed SPARE to R/L key (russian/latin)
 fixed PPI.PA0 (looked like CSAY, but probably should be C8 capacitor near HY)
 renamed Gate Array 3 to Ext.Reg, and instead added Gate Array elsewhere
 added notes on disk A: and B: drive select
 added 3.3' and 3.3'' notes on cpu CLK signal
 added HX=hsync, HY=vsync (sheets 1 and 2), HX also sheet4 (for FUTURE)
 added note on D89 being RAM bank related (sheet3,lower-right)
 added note to PAGE and to /PAGE (middle of sheet1) (aka PAGE* and /PAGE*)
 added note on "A"=A8 (A14) and "B"=A9 (A15), derived on sheet3, used on sheet2
 added note on FUTURE (2nd color bank, in 2- and 4-color mode) (sheet 2,4)

I've also discovered that the schematics show that CRTC, PPI, USART, etc. have VCC and GND not connected... maybe that explains why there is no visibly power-supply connection on the photos :-)

Offline genesis8

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Re: Aleste 520EX
« Reply #19 on: 00:40, 05 February 10 »
I may possibly come at the retromadrid,  on monday I will check if I can take holidays around the 13th.
____________
Amstrad news site at Genesis8 Amstrad Page

Offline Cpcmaniaco

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Re: Aleste 520EX
« Reply #20 on: 02:20, 05 February 10 »
Good news listen that more people can go to RetroMadrid.

About the Aleste.

The Power-supply is on the external disc drive.


Offline deepfb

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Re: Aleste 520EX
« Reply #21 on: 09:41, 05 February 10 »
Or do mean more original ones with better resolution or so?

Yes, that's what I mean. I took almost fifty pictures of the computer, its screens, the sound expansion and the disk drive.

The bottom side of the mainboard would be nice! And, one thing I was wondering is if the "analog" and "digital" supply voltages are simply short-cut with each other (the four soldering points, seen at the right edge of the board).
NB. the Aleste *does* use a power-supply, doesn't it? Or does it run all by itself? :-) I couldn't find a power-supply connection on any of the photos.


I'll try to take the photographs this weekend.
The power supply is in the black box that houses the disk drive. And there's no particular soldering point for it on the board: you can solder +5v and ground to any point of the edge of each side of the board (+5v goes to soldering side and ground goes to parts side, if i'm not wrong)

Do you know what it does exactly? Double clock with 8MHz instead 4MHz?

No idea, sorry :-/

PS. what's the story behind the Magic Sound board photos?
About a handful of important chips seem to be not installed on it.


It was included in the lot we bought. I haven't been able to make it work -thus you may be right and it may lack of some parts. I had to learn a little bit of Russian language before I managed to find and purchase this Aleste, but not enough to be sure of what we were exactly buying :-D.

I may possibly come at the retromadrid,  on monday I will check if I can take holidays around the 13th.

That would be great! :-)

Offline nocash

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Re: Aleste 520EX
« Reply #22 on: 19:37, 05 February 10 »
> The Power-supply is on the external disc drive.
Okay. But still needs a separate cable to the computer, doesn't it?
The floppy connector has GND, but not UCC (+5V) on it. Least unless you'd put it on the unused pins.

> there's no particular soldering point for it on the board:
> you can solder +5v and ground to any point of the edge...
Should work, too. The component map on http://cpcwiki.eu/index.php/Aleste_520EX suggests to use the UCC and GND pins (on the right edge), since it's TTL, this would be UCC=5V, GND=0V.

The unclear part are the Uan+ and Uan- pins (nearby the above pins). On the low-quality picture of the PCBs bottom side, it looks as if they'd be shortcut with UCC and GND, so they would be 5V and 0V, too?

> I took almost fifty pictures of the computer, its screens,
> the sound expansion and the disk drive.
Could be great, maybe putting them on a separate "more pictures" page.
-- Is there a limit on cpcwiki, saying better not to upload 50 pictures?

>> PS. what's the story behind the Magic Sound board photos?
>  I haven't been able to make it work -thus you may be
> right and it may lack of some parts.
Pretty sure then. The schematic sheet 2/2 on http://cpcwiki.eu/index.php/Magic_Sound_Board lists both russian and western part numbers, and their location in the component map. So it should be easy to get it working. The two big timer chips may be hard to find though.

Offline nocash

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Re: Aleste 520EX
« Reply #23 on: 06:01, 06 February 10 »
Hi Deepfb, since you are from spain and collect hardware. Do you happen to know something about this thing: http://cpcwiki.eu/index.php/MHT_Speech_Synthesizer ? If, yes, maybe better post the answer here: http://cpcwiki.eu/forum/index.php/topic,503.105.html (speech related part of forum).
« Last Edit: 06:06, 06 February 10 by nocash »

Offline deepfb

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Re: Aleste 520EX
« Reply #24 on: 16:36, 06 February 10 »
Do you happen to know something about this thing?

Yes, and I know those pictures, also :-)
...but cpcmaniaco should be the one to reply, not me. I'll take some more pics of it and the Aleste tomorrow, anyway.