Author Topic: DMA/CPU accelerator board  (Read 441 times)

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Offline rpalmer

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DMA/CPU accelerator board
« on: 01:31, 04 September 19 »
People,
Here is a schematic and documentation for a conversion of the CPC to enhance the motherboard with more capabilities.
The zip file is a Word 2010 document and details what the intention of the changes mean for an AMSTRAD CPC classic 6128 only. As for an implementation on the CPC464 or 664 or the plus ranges of the CPC, they are not possible right now as I don't have any of them to work on.

Hope people find this information useful.
rpalmer

Offline Bryce

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Re: DMA/CPU accelerator board
« Reply #1 on: 10:07, 04 September 19 »
A 160MHz Cyclone II to add DMA to a 4MHz CPU!  :D Why not.

Bryce.

Offline GUNHED

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Re: DMA/CPU accelerator board
« Reply #2 on: 13:36, 04 September 19 »
One little thing (you probably already know). There are already some expansions which run well with a 6 MHz Z80, and others don't.


That's an interesting project. I need to study this in greater detail.  :)
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Offline rpalmer

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Re: DMA/CPU accelerator board
« Reply #3 on: 23:39, 04 September 19 »
GUNHED,
Yes I knew of projects pushing the CPC to 6MHz, but they just change the crystal from 16MHz to 24MHz (to get 6MHz) to the CPC.
My project will simply bypass the Gate Array all together to feed the CPU whatever clock it can handle from the FPGA.

rpalmer

Offline Bryce

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Re: DMA/CPU accelerator board
« Reply #4 on: 09:42, 05 September 19 »
GUNHED,
Yes I knew of projects pushing the CPC to 6MHz, but they just change the crystal from 16MHz to 24MHz (to get 6MHz) to the CPC.
My project will simply bypass the Gate Array all together to feed the CPU whatever clock it can handle from the FPGA.

rpalmer

But that would loose sync with a lot of the other hardware in the CPC. How would memory access then work, or will this only work when the entire internal RAM is no longer used?

Bryce.

Offline VincentGR

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Re: DMA/CPU accelerator board
« Reply #5 on: 10:01, 05 September 19 »





"bypass the Gate Array all together"


You mean that this will be asynchronous with the rest chipset like i.e an Amiga accelerator?

Offline rpalmer

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Re: DMA/CPU accelerator board
« Reply #6 on: 00:18, 06 September 19 »
But that would loose sync with a lot of the other hardware in the CPC. How would memory access then work, or will this only work when the entire internal RAM is no longer used?

Bryce.
The FPGA board auto configures into 2 states.
With just the FPGA and a replacement of the DRAM with a SRAM replacement the board works in unison with the current cpc and only provides the DMA functions.
The other state requires more boards to replace the various chips as the documentation mentions and these all allow the FPGA to do all of the memory access control leaving the gate array to only handle the requested video data it requests and gets via the FPGA.

rpalmer