Author Topic: Disabling ROM 7  (Read 12754 times)

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Offline TFM

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Re: Disabling ROM 7
« Reply #50 on: 23:40, 24 October 13 »
Exactly! That's what I've been trying to tell TFM for a long time.

Bryce.


Haha! Oh no! You always refused that possibility completely. But never mind, I can life with that - as good winner  ;)
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Offline TFM

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Re: Disabling ROM 7
« Reply #51 on: 23:41, 24 October 13 »
Well, he 'proved' that external expansions can disable the internal rom 7 on SOME 6128. And discussing that 28345698 or more will not make this work on ALL 6128  :P .
Talking about proof, it would be nice to :
   1. identify revision of board that can disable ROM 7 from external extension.
   2. Get an updated schematic for these revision.


Lalala... in short: Get a patch for it!  :)
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Offline gerald

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Re: Disabling ROM 7
« Reply #52 on: 23:42, 24 October 13 »
To add more confusion (or clarity?) to this topic - I have two 6128s here, one of them (an MC0020C) gets the ROM 7 disabled when you connect the LowerROM, the other (an MC0020I) does not.

Can you trace back on the PCB how pin 20 (CEn) and 22 (OEn) of the ROM are driven on your MC0020C ?

Online Bryce

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Re: Disabling ROM 7
« Reply #53 on: 23:55, 24 October 13 »
From my experience, the Classic boards that have the ASIC/Pre-ASIC always disable ROM7 when ROMDIS is set. But the others (as in this case), don't seem to do it reliably. It doesn't happen everytime, so I have a feeling that it's a glitch due to the layout, rather than an intended feature. I had a PCB here for repair and played about with the LowerROM board a bit. It disabled ROM 7 about 70% of the time. I didn't have time to really intensely investigate it (I had to return the board to it's owner), so I didn't get to the bottom of what was causing it. I assume it's a bus contention issue.

Bryce.
« Last Edit: 23:56, 24 October 13 by Bryce »

Offline gerald

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Re: Disabling ROM 7
« Reply #54 on: 23:56, 24 October 13 »
Haha! Oh no! You always refused that possibility completely. But never mind, I can life with that - as good winner  ;)
Lalala... in short: Get a patch for it!  :)

Well, none of these post helps in understanding how this is working from a logical point of view :(
.... but tells a us a lot about TFM (Who let him escape from the kindergarten  ;) )

Offline TFM

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Re: Disabling ROM 7
« Reply #55 on: 00:07, 25 October 13 »
What a stupid comment! But ok, judge others by talking about yourself.




You talk, talk, talk and talk....  But somebody has to bring it on the point: A patch for all CPCs which enables the external deactivation of ROM 7 would be beneficial. That's the point. And somebody has to state it instead of pussyfooting around!


Now compare both PCBs and you have your patch!

TFM of FutureSoft
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Online Bryce

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Re: Disabling ROM 7
« Reply #56 on: 00:14, 25 October 13 »
If my theory of how it happens is correct, then it's a fundamental difference in the layout. This isn't something you could could patch. You don't add anything, you just change the physical position of the components, or maybe use a different manufacturer or version of particular logic ICs.

Bryce.
« Last Edit: 10:14, 25 October 13 by Bryce »

Offline TFM

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Re: Disabling ROM 7
« Reply #57 on: 00:26, 25 October 13 »
Ok, replacing the SED [nb]and some smaller changes[/nb]is not enough. Well, good to know. So software can care about it.  :)
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Offline gerald

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Re: Disabling ROM 7
« Reply #58 on: 00:38, 25 October 13 »
What a stupid comment! But ok, judge others by talking about yourself.
Thanks reminding me not feeding the trolls  :-*

Now compare both PCBs and you have your patch!
When I will have MC0020C, I will have a look at it and see is there is a difference at all. However, I am pretty confident that there are none regarding ROM 7 and ROMDIS.

Offline Munchausen

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Re: Disabling ROM 7
« Reply #59 on: 01:18, 25 October 13 »
Can you trace back on the PCB how pin 20 (CEn) and 22 (OEn) of the ROM are driven on your MC0020C ?


I put it in storage this afternoon (it is my "best" 6128 - the keys aren't faded at all) but I will get it out and compare it to the MC0020I at some point, maybe next week, I'm away for the weekend.


I'm still not clear on which is the unusual one, the one where ROM 7 can be disabled with ROMDIS, or the one where it can't? I mean, what is the intended behaviour of ROMDIS - to disable all internal ROMs, or all except ROM 7?


Surely a patch could be made just by attaching ROMDIS or its inversion to the enable pin(s) on the ROM?
« Last Edit: 01:20, 25 October 13 by Munchausen »

Offline redbox

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Re: Disabling ROM 7
« Reply #60 on: 10:05, 25 October 13 »
Can you trace back on the PCB how pin 20 (CEn) and 22 (OEn) of the ROM are driven on your MC0020C ?

I have several 6128s with different PCB revisions, so how would you trace it back? 

Would a photo of the underside of the PCB suffice (I am no electronics expert!).

Online Bryce

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Re: Disabling ROM 7
« Reply #61 on: 10:22, 25 October 13 »
The "Normal" function of ROMDIS in a classic CPC is to disable ROM0 only. The internal ROM7 also uses ROMDIS internally to disable ROM0 when it has been selected. So if you somehow added a wire to make it disable ROM7, then ROM7 would disable itself everytime it was selected. I don't think that would be very useful. :)
The Classic, non-ASIC CPCs that are disabling ROM7 with the LowerROM aren't doing it through ROMDIS, it's happening (as far as I can figure out) due to bits being over-written on either the data or address bus. 

Bryce. 

Offline gerald

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Re: Disabling ROM 7
« Reply #62 on: 11:43, 25 October 13 »
I'm still not clear on which is the unusual one, the one where ROM 7 can be disabled with ROMDIS, or the one where it can't? I mean, what is the intended behaviour of ROMDIS - to disable all internal ROMs, or all except ROM 7?
Short answer : none are unusual  ;) .  They both react differently to a same issue.

Long answer :

Well, from a schematic point of view, ROMDIS has no effect on ROM 7 in a 6128 (but also 664 and DDI).
ROMDIS is connected to the FW/BASIC ROM output enable, effectively preventing that ROM to drive the bus when ROMDIS is high.
ROMDIS is also driven from the internal ROM 7 handling logic through a diode, forming a wired OR with external peripherals that must also drive ROMDIS with a diode.

Bryce LowerRom is driving the ROMDIS continuously when enabled. That mean that the FW/BASIC Rom is always disabled, but internal ROM 7 can still be selected and accessed.
LowerRom EPROM is only disabled by extension connected to its own port via a chained ROMDIS, which allow disabling the eprom when a megaflash or like ROM is selected.

So, if you start you CPC with a LowerRom board connected and enabled and no other extension, the FW will start enumerate the ROM. When selecting ROM7, the internal one will be activated as it is not sensible to ROMDIS at all and drive the bus when read.
Here is the issue :
  Since the LowerRom eprom is only disabled by the LowerRom local ROMDIS, both eprom will drive the bus (amsdos and lowerRom). This result in a bus contention where result is a mix of pad drive (how strong is the data pad to drive high or low) and a timing issue (who is the last eprom to drive the bus). That can lead to the internal ROM 7 being registered by the FW or not. MC0020C seems to be on the not side.
  When adding a ROM board with ROM 7 active, the bus contention will happen between the romboard and internal ROM7.

Offline gerald

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Re: Disabling ROM 7
« Reply #63 on: 11:50, 25 October 13 »
So if you somehow added a wire to make it disable ROM7, then ROM7 would disable itself everytime it was selected.
There is a way do do it, but requires a bit to butchery on the PCB ( and have Toto on our back :D ).
Basically we need to insert a diode between the expansion port ROMDIS input and the FW/BASIC ROM. This diode will allow us to differentiate who from the expansion port and the internal ROM7 logic is driving the ROMDIS at IC103 level.
Now can add a small logic that will take the expansion port ROMDIS before the diode and use it to prevent the ROM7 from being selected.

Offline gerald

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Re: Disabling ROM 7
« Reply #64 on: 12:04, 25 October 13 »
I have several 6128s with different PCB revisions, so how would you trace it back? 

Would a photo of the underside of the PCB suffice (I am no electronics expert!).
Tracing back the signal will require a continuity tester as IC may mask the tracks.
Also, since the floppy logic schematic in service manual does not match the schematic of revision MC0020 and upper, tracing back will also involve doing that schematic.
A simple start, if you have a MC0020C, board will be to compare the PCB at track level to any other MC0020 revision board and report differences.

But the easiest way of proving that ROMDIS has no effect on the internal ROM 7 (even on MC0020C)  is to use a scope or logic analyser on pin 20 and 22 and see them low even with ROMDIS high !

Online Bryce

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Re: Disabling ROM 7
« Reply #65 on: 12:28, 25 October 13 »
Great explanation and also an interesting solution to the problem, but it would be quite a bit of PCB butchery, not something I'd want to do to my CPCs.

Bryce.

Edit: Just as a side note. The original LowerROM design isn't from me, it was a commercial product available back in the day. I merely added the feature of having two LowerROM images available instead of the original one and did a new layout. The "ROMDIS always high" is how the original device did it too.
« Last Edit: 12:31, 25 October 13 by Bryce »

Offline gerald

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Re: Disabling ROM 7
« Reply #66 on: 12:42, 25 October 13 »
not something I'd want to do to my CPCs.
Neither do I  ;)

Edit: Just as a side note. The original LowerROM design isn't from me, it was a commercial product available back in the day. I merely added the feature of having two LowerROM images available instead of the original one and did a new layout. The "ROMDIS always high" is how the original device did it too.
Well, I was not finger pointing you, but since I sometimes write lower rom instead of LowerRom, the 'Bryce' force me to think the right way  ???

Online Bryce

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Re: Disabling ROM 7
« Reply #67 on: 12:50, 25 October 13 »
My strange naming system like LowerROM or MegaFlash (with capitals in the middle) probably comes from the mixture of having spoken Irish as a kid (where capitals are possible in the middle of a word) and now mainly speaking German (where words get stuck together to make new ones). Seriously messed up! :D

Bryce.

Offline TotO

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Re: Disabling ROM 7
« Reply #68 on: 14:09, 25 October 13 »
To add more confusion (or clarity?) to this topic - I have two 6128s here, one of them (an MC0020C) gets the ROM 7 disabled when you connect the LowerROM, the other (an MC0020I) does not.
Like I said here, 9 months ago, My MC0020C CPC get the ROM 7 disabled when I plug the LowerROM.
You just confirm that. ;)
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Offline Audronic

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Re: Disabling ROM 7
« Reply #69 on: 02:31, 15 November 17 »
Hi All


I have just read this all from Page 1 to Page 7 . Phew


Thanks for the info


Ray
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Offline khaz

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Re: Disabling ROM 7
« Reply #70 on: 04:22, 15 November 17 »
Wait, I have the board MC0020C and an X-MEM. You're telling me I can put Parados as real 7 without cutting a trace or lifting a pin? I think I tried putting a ROM at 7 without success before, so I settled for having it in 6th. Is there a special trick for that?

Offline Audronic

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Re: Disabling ROM 7
« Reply #71 on: 04:39, 15 November 17 »
@kahz - et All


I don't know.
My interest was to Put Geralds RamTest Rom in Slot 7 (X-mem) to do some testing.
But after reading the above I am Confused (More than normal)


I will keep looking


Ray
« Last Edit: 04:43, 15 November 17 by Audronic »
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Offline GUNHED

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Re: Disabling ROM 7
« Reply #72 on: 18:53, 16 November 17 »
The X-MEM does not support ROM 7. It does support an alternative lower ROM instead.


My CPC6128's actually can software-replace ROM 7. Other CPC6128 seem not to be able. All depending on the board.

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Offline Audronic

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Re: Disabling ROM 7
« Reply #73 on: 00:01, 17 November 17 »
@GUNHED


Welcome Back.


I would like to Place Geralds " Ramtest " ROM on an x-mem board.
? Where do i place it Please.
It will be used to check a Cpc464.


Thanks


Ray
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Online Bryce

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Re: Disabling ROM 7
« Reply #74 on: 10:17, 17 November 17 »
The RAMTest has to be in the LowerROM position.

Bryce.