MEGAFLASH interface

[wilco2009]

As I tell you in my presentation topic, I'm making with a group of friends a megaflash interface, but modifying the layout to be able to use a specific box.
In my version I have used a EDGE conector directly to the PCB, and is possible to choose use a SMD, or DIP flash memory, at your choice.


Now I have the first interface built and I want to show you the results.


The idea is to remove the led and the switch from the PCB and install them in the box, to let the access with the box closed, but now is totally operative.


First the board design:





Now the board result.








The interface without box:








With box:











Starting with the interface connected;



Handling the interface with ROMAN





Write mode:




All is working right, except for the initialization (unprotect) of the chip. It is not working from ROMAN and is not working from MegaFlash ROM Manager either.
I have to unprotect the chip from the EPROM programmer.


Somebody have any idea what is happening?

[mr_lou]

Very nice! 

[IanS]

Nice that you have the choice of dip or plcc flash chip. You could have made it so the DIP socket could be cut off if you fitted the plcc chip.

I'm suprised you bothered with a ziff socket, does it need to come out that often?

[IanS]

All is working right, except for the initialization (unprotect) of the chip. It is not working from ROMAN and is not working from MegaFlash ROM Manager either.
I have to unprotect the chip from the EPROM programmer.

So is it just the unprotect that doesn't work. Once unprotected in your eprom programmer you can flash individual roms?

[Bryce]

What a great mod. Really nicely done. Very nice of you to mention me on the board too

Bryce.

[wilco2009]

So is it just the unprotect that doesn't work. Once unprotected in your eprom programmer you can flash individual roms?

Nice that you have the choice of dip or plcc flash chip. You could have made it so the DIP socket could be cut off if you fitted the plcc chip.

I'm suprised you bothered with a ziff socket, does it need to come out that often?

Yes, once unprotected I can write roms without problems.


ZIF socket is mainly for 464 users.
By other hand, I hope it will be not used as often as now in the future, but now I'm plugging and unplugging the chip many often to do trials

[wilco2009]

What a great mod. Really nicely done. Very nice of you to mention me on the board too

Bryce.

Many thanks Bryce. 

[Bryce]

Why did you go for a soldered PLCC footprint instead of Socket? Or will an SMD PLCC socket fit there? It looks a bit too tight to fit.

Bryce.

[IanS]

Yes, once unprotected I can write roms without problems.

If you read the flash chip in your eprom programmer does the data look ok? Do the roms appear at the right address within the flash? (I'm wondering if any of the data or address lines are mixed up, if they were the commands and addresses used for the unprotect command would be wrong)

[Bryce]

If any of the address or data lines were mixed up, then it wouldn't work as a ROMBoard at all. At least not for the ROMs he had written with the EPROM Programmer.

Bryce.

[wilco2009]

Why did you go for a soldered PLCC footprint instead of Socket? Or will an SMD PLCC socket fit there? It looks a bit too tight to fit.

Bryce.

ZIF socket is something optional. Some guys ask me to include one and other not. With a ZIF socket installed there are no room to install a PLCC socket, but with a standard socket you can install both.

[wilco2009]

If you read the flash chip in your eprom programmer does the data look ok? Do the roms appear at the right address within the flash? (I'm wondering if any of the data or address lines are mixed up, if they were the commands and addresses used for the unprotect command would be wrong)

If any of the address or data lines were mixed up, then it wouldn't work as a ROMBoard at all. At least not for the ROMs he had written with the EPROM Programmer.

Bryce.

Exactly. It works with a flash (or EPROM) programmed with a EPROM programmer without problems.


ROMs can be written from the disk to the interface with ROMAN or MEGAFLASH ROM Manager perfectly.


The only thing I can't do from the interface is unprotect the chip.

[Bryce]

ZIF socket is something optional. Some guys ask me to include one and other not. With a ZIF socket installed there are no room to install a PLCC socket, but with a standard socket you can install both.

I understood that bit. I actually thought that a PLCC socket might hit IC3? That looks close.

Bryce.

[IanS]

If any of the address or data lines were mixed up, then it wouldn't work as a ROMBoard at all. At least not for the ROMs he had written with the EPROM Programmer.

Bryce.

I agree, but at the time I made the comment he never said he'd written any roms from his eprom programmer, I could only see a comment about unprotecting it with his epron programmer.

Actually if A14 and above were mixed up, the roms would work but appear out of order, but the unprotect command wouldn't work.

Does the rom written at &4000 via the eprom programmer appear as rom 1 on the CPC?

[wilco2009]

I agree, but at the time I made the comment he never said he'd written any roms from his eprom programmer, I could only see a comment about unprotecting it with his epron programmer.

Actually if A14 and above were mixed up, the roms would work but appear out of order, but the unprotect command wouldn't work.

Does the rom written at &4000 via the eprom programmer appear as rom 1 on the CPC?

I don't think so, but I'm not sure.
I will check it and I'll tell you the results.

[TFM]

The only thing I can't do from the interface is unprotect the chip.

Yes, my ROManager can do that. But you need ROM 0 be switched active when performing that task. Take a look at the manual. 

[Kris]

Very nice project !

[wilco2009]

I don't think so, but I'm not sure.I will check it and I'll tell you the results.

The order is totally right in the 32 positions.

Yes, my ROManager can do that. But you need ROM 0 be switched active when performing that task. Take a look at the manual. 

Oh!!!, It will be the problem!!, I have ROM 0 inactive. 


I'll try it and tell you.

[IanS]

Yes, my ROManager can do that. But you need ROM 0 be switched active when performing that task. Take a look at the manual. 

I understand why that's the case, but it doesn't have to be. The 29c040 datasheet is inconsistant, but my testing confirms that it only takes A0-A14 into account for the command addresses, so when you think you need to select rom 0 for the appropriate address, you can also select any rom where A14 (thats D0 of the rom number) = zero. Does that make sense?

[wilco2009]

I understood that bit. I actually thought that a PLCC socket might hit IC3? That looks close.

Bryce.

In the picture, you can see, if you use a convencional socket, you can install both chips at once.








In any case, my initial idea is to choose the technology at manufacture time. In this case you only install one of them.
But could be useful if you install both simultaneously in case of you have chips of both technologies.

Yes, my ROManager can do that. But you need ROM 0 be switched active when performing that task. Take a look at the manual. 

Mistery solved, the problem was ROM0 has to be active.


Everithing is working right now.


Thank you very much to everybody.

[TFM]

I understand why that's the case, but it doesn't have to be. The 29c040 datasheet is inconsistant, but my testing confirms that it only takes A0-A14 into account for the command addresses, so when you think you need to select rom 0 for the appropriate address, you can also select any rom where A14 (thats D0 of the rom number) = zero. Does that make sense?

A14 or A15 ??


So instead of ROM 0 you could select ROM 128 ??

[IanS]

A14 or A15 ??

So instead of ROM 0 you could select ROM 128 ??

The flash chip is 512KB device, which has address pins A0 to A18, 19 address pins. A0 to A13 (14 pins 16K) are driven directly from the address pins of the CPC. The top 5 pins are driven from a latch that is loaded when the rom number is selected. So bit 0 of the rom number drives A14 of the flash chip (bit 1->A15 bit 2->A16 etc.)

Only address pins A0-A14 of the flash chip need to be set correctly for the protect/unprotect commands to work. So if you select any rom number where bit 0 of the romnumber is zero (e.g. 2,4,6 or any even number) it should be ok.

So the two address used by the protect/unprotect commands are:-
5555 = Rom 1 (A14=1) cpc address = D555
2AAA = Rom 2 (A14=0) cpc address = EAAA

Any clearer?

[TFM]

Aehm... still sick at home with the flu. But thanks' for the explanation! Now I ask if this does work with all Flash chips? Can somebody confirm with real hardware?

[TotO]

That only work with Winbond compatible chip. We use that on the CTC-AY cartridges.
So, better to read the datasheet in all cases.

[TFM]

That only work with Winbond compatible chip. We use that on the CTC-AY cartridges.
So, better to read the datasheet in all cases.

Alright. To be at the safe side I leave all like it is and the user has to switch on ROM 0. And why not? It usually contains a copy of the real ROM 0 (or an advanced version). So no reason to keep it OFF.


However I may add a 'Flash-manufacturer ID recognizer' one day and then this knowledge may be beneficial.


Thanks' to everyone for your comments. Very interesting.