Author Topic: CPC Interrupts  (Read 332 times)

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Offline zhulien

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CPC Interrupts
« on: 03:27, 04 December 19 »
Hi Everyone,


Regarding CPC Interupts.


What is the most reliable way to patch interrupts from BASIC's point of view?  Usually I just intercepted #0038, is there a better way? 

« Last Edit: 03:34, 04 December 19 by zhulien »

Offline Targhan

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Re: CPC Interrupts
« Reply #1 on: 11:23, 04 December 19 »
Quick answer... NEVER do that in Basic! The firmware has some nice vectors to allow plugging your own asm code every 50 or 300hz. Sorry I don't have the doc right now, make a quick search, but if you don't find anything, please say so. Stay BASIC compliant when doing Basic!
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Offline andycadley

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Re: CPC Interrupts
« Reply #2 on: 12:05, 04 December 19 »
You need to add your handler to one of BASIC's "tick" lists using the relevant firmware calls. The ROM will only call a handler at 0038 in response to an external interrupt (i.e. one not from the gate array) and so putting a hook there will be unreliable, as it will normally only be called if RAM happens to be paged in at the time the interrupt occurs.

Offline Targhan

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Re: CPC Interrupts
« Reply #3 on: 13:56, 04 December 19 »
You can find the vectors here (the ones that are useful to you start at #bcd7). Some examples are here. This is in french, but the "programme 3" at the bottom is exactly what you need at have your asm code called every 50hz.
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Offline Docent

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Re: CPC Interrupts
« Reply #4 on: 16:35, 04 December 19 »
Hi Everyone,


Regarding CPC Interupts.


What is the most reliable way to patch interrupts from BASIC's point of view?  Usually I just intercepted #0038, is there a better way?

You can use events to configure system friendly way of calling functions at regular time intervals.
Check details on KL NEW FAST TICKER (&BCE0) for 1/300th sec. and KL ADD TICKER (&BCE9) for 1/50th second.


Offline zhulien

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Re: CPC Interrupts
« Reply #5 on: 01:32, 05 December 19 »
Thanks. I am guessing the basic vectors handle whether roms are enabled or not?  Can our code lie in rom also or only in central ram?

Offline andycadley

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Re: CPC Interrupts
« Reply #6 on: 04:40, 05 December 19 »
The lower ROM is effectively fixed, so if you want your code to work while the firmware is active, you have to play by its rules. And one of those rules is using the firmware functions to add or remove interrupt events.

Offline zhulien

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Re: CPC Interrupts
« Reply #7 on: 11:32, 05 December 19 »
that might explain why my MCP POC althought it is multitasking, seems to be running a little slower than it should - likely missing lots of ticks.

Offline Docent

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Re: CPC Interrupts
« Reply #8 on: 02:03, 06 December 19 »
Thanks. I am guessing the basic vectors handle whether roms are enabled or not?

Yes, you specify the rom in C register.

Quote
  Can our code lie in rom also or only in central ram?

The event block needs to be in the central 32kb of ram. The routine to execute can be anywhere, even in rom, but it executes faster when located in the central 32kb (no rom switching etc)

Offline zhulien

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Re: CPC Interrupts
« Reply #9 on: 02:18, 06 December 19 »
Any suggested ISR improvements in my POC code?


https://drive.google.com/drive/folders/1Xvirgaep8dHFQUSaQxa5aQRV_SIbAfbR


(the patching #0038 code is commented out and the firmware tickers are used)