Talk:Arnold V specs

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Revision as of 18:19, 27 July 2007 by Executioner (Talk | contribs)

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The ASIC uses the IVR in combination with the DCSR (DMA Control/Status register) to place a value on the data bus during an interrupt. From the documentation I've read, the Z80 ignores bit D0 during an IM2 interrupt vector lookup, but this isn't the case in IM0. Further testing needs to be done in order to determine what the ASIC actually places in bit D0 during an interrupt. This bit is also used to automatically clear DMA interrupts when set to 0. Testing IM0 interrupts shouldn't be a hard task, I will do it as soon as possible, unless someone already knows the answer? Executioner 01:00, 27 July 2007 (CEST)

Hello mate... Sorry, I don't know the answer, just wanted to comment on your changes on the document: first of all, thanks so much for going over it in such detail, that's fantastic work. However, as the title of the document shows, this is an internal document of Amstrad regarding the Arnold specs. Changing bits here and there takes away from its historical value, since you're changing an original source document. If you can, please revert the changes, and only put the corrections in brackets or something... Gryzor
Hi Gryzor, I've done the tests and answered my own question. There are two versions of the original document converted by Rob Scott and Paul Fairman, the latest original source document is actually missing some important information which was in the original (1.4) version. The latest version for download on Cliff Lawson's site has some more detailed information provided by Kev Thacker. I will be updating the original source document to include the information I have added (and tested) so that it is as accurate as possible, and sending the new version to Cliff. Is this document really there just for historical value, or as a reference for Plus developers? Executioner 01:19, 28 July 2007 (CEST)