1000$ question about cpc 6128 schematics

[orzel]

If you look at the '464 schematics you'll see that the GA actually has these pull-ups internally on /MREQ, /IORQ, /RD and /WR, as well as on it's open collector output signals - thus saving Sir Alan a few bob in components. I'm not sure why they felt the need for an additional pull-up on the CMOS models. It's probably down to the analogue properties of component pins or, maybe, stricter timing requirements (HC and HCT tend to be a little slower than LS).

I'm not sure to follow. What's the link between /busrq and /iorq ? If /busrq is active, /iorq will go high-z (tristate) and the lack of pull-up will be dangerous in this case ?

I had never looked at the '464. Indeed, a lot of pullups in the ga. That's a difference between 40007/40008 and 40010 ? Or does the 40010 also have those ?

What a complicated way of generating the 16MHz signal... i dont even understand how it works. The same circuit on the 6128 is far more standard (and simpler)

[pelrun]

/busrq causes the Z80 to *completely* disconnect from the bus, not specifically /iorq. If there's nothing to pull the now undriven signals to defined levels, they'll float randomly.

You don't leave signals to float if you want your design to behave predictably.

[Bread80]

If /busrq is active, /iorq will go high-z (tristate) and the lack of pull-up will be dangerous in this case ?

Exactly this but, as pelrun says, across multiple Z80 output signals.

I presume the pull-ups are in all GA revisions. However since the /BUSRQ feature was very rarely used I'm sure anyone would have noticed if they didn't.

Oscillator circuits are close to voodoo as far as I'm concerned so I leave their design to others.

[orzel]

Exactly this but, as pelrun says, across multiple Z80 output signals.

I presume the pull-ups are in all GA revisions. However since the /BUSRQ feature was very rarely used I'm sure anyone would have noticed if they didn't.

Oscillator circuits are close to voodoo as far as I'm concerned so I leave their design to others.

Yes, sure, on all out/bidir signals.

I can't see anything about such pull-ups in Gerald document summarizing the internals of the 40010 (40010-simplified_V03.pdf)

I completely agree with oscillators :-)

[pelrun]

Gerald's schematic doesn't include the electrical behaviour of the pins, it only describes the logical behaviour reverse engineered from the gate array itself. The pins are handled by fixed IO blocks at the edge of the chip that aren't part of the array.

[robcfg]

Which you can see in the beautiful pictures here: https://www.cpcwiki.eu/index.php/Gate_Array#Pictures 

[orzel]

I've seen those beautiful pictures. Not that i can recognize the resistors or purely logical cells.
What about people putting this in CPLD ? Do they have pull-ups outside the CPLD ? Or can the CPLD provide them ?
I've noticed at least two (commercial) such design : sellmyretro (xc95288xl) and vretrodesign (i can't find which cpld is used).