Author Topic: A Minimal Gate Array  (Read 1373 times)

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Offline kolleykibber

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A Minimal Gate Array
« on: 15:24, 20 February 21 »
Lockdown, CPCwiki and nostalgia have sent me further down the CPC rabbit hole and I've found myself with a 464 with a bad gate array.
It came with a 9V AC PU with a 5 pin din socket, which conveniently fitted into the monitor socket.



So it appears I am one of many searching for a cheap 40010. 


I was looking at the schematics and I was wondering if anybody has tried a minimal gate array with just a frequency divider for the clocks and Rom enable functionality? This would get the machine running. I was thinking you could then use something similar to the ZX-HD/RPi to mirror the bus for memory and GA registers to output HDMI.


So For the minimal in socket stuff you would need CK16, A15, A14.
Out you would have clocks _NPHI, _CCCK, _NCPU and rom lines _NRAMRD, _ROMEN


Seems exciting to me. Once a screen is working, maybe the 6845 lines could be monitored. Or some kind of raspberry pi super multiface. Another bonus is the cpc would run at 4MHZ.


So I ask the wisdom of CPCwiki hardware, are there any complications that would prevent this from working?
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Offline Bryce

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Re: A Minimal Gate Array
« Reply #1 on: 17:01, 20 February 21 »
I was looking at the schematics and I was wondering if anybody has tried a minimal gate array with just a frequency divider for the clocks and Rom enable functionality? This would get the machine running.


This definitely WOULDN'T get the machine even close to running.

Bryce.
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Offline kolleykibber

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Re: A Minimal Gate Array
« Reply #2 on: 21:45, 20 February 21 »
Hi Bryce,
I've recently been reading a lot of your writing, thank you for that!


I know that there would be no video, but I can't see anything on the schematic that would prevent the machine booting if you provided clocks and the rom/ram functionality. I'd be keen to know what else the gate array is involved in during boot. Everything else appears to go one way. Apologies if I'm missing something obvious!
« Last Edit: 22:58, 20 February 21 by kolleykibber »
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Offline Bryce

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Re: A Minimal Gate Array
« Reply #3 on: 01:44, 21 February 21 »
Well you definitely wouldn't have a picture. You'd also have no sound or keyboard, but none of these matter, because ROMEN is controlled by the GA and without this you won't be reading the firmware anyway.

Bryce.
« Last Edit: 01:45, 21 February 21 by Bryce »
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Offline GUNHED

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Re: A Minimal Gate Array
« Reply #4 on: 04:55, 21 February 21 »
The KCcompact (compatible to the CPC) has TTL chips instead of the Gate Array. Check its schematics.
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Offline kolleykibber

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Re: A Minimal Gate Array
« Reply #5 on: 21:41, 21 February 21 »
Thanks Gunhed for the kc compact tip. Had a quick look and it may take some time to get through. None of amstrads frugality with the components there.


Hi Bryce, If all expected clocks and romen funtionality were provided what would prevent the sound and keyboard working?


Video would be provided by something similar to the TK-Pie/ZX-HD. This monitors the bus for memory/gate array IO writes. Then a raspberry pi running bare metal code recreates the gate array video logic. You get the benefit of HDMI out of the raspberry pi. There would be no need for the video memory reads that the GA needs. The one thing that would prevent this is if there was something specific in the CPC firmware that expects the GA memory reads, but I can't think of a reason why this would be so.


Here's Tk-Pie for reference:-
https://gitlab.com/victor.trucco/TK-Pie


I've been looking at the gate array schematics from Gerald(!) for clocks and rom switching. They are a very small part of the GA.


Thanks again for your advice.


« Last Edit: 04:25, 22 February 21 by kolleykibber »
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Offline TotO

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Re: A Minimal Gate Array
« Reply #6 on: 09:52, 22 February 21 »
Hello,

I have started 2/3 years ago (from the gerald's schematic) to do a version using two CPLD.
One side is the frequency synthesizer and the second is the display processor. It was not tested, but I can provide it.

Else, you can take a look into the MiSTer VHDL code around the GateArray done from the same source.
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Offline Bryce

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Re: A Minimal Gate Array
« Reply #7 on: 11:14, 22 February 21 »
Thanks Gunhed for the kc compact tip. Had a quick look and it may take some time to get through. None of amstrads frugality with the components there.


Hi Bryce, If all expected clocks and romen funtionality were provided what would prevent the sound and keyboard working?


Video would be provided by something similar to the TK-Pie/ZX-HD. This monitors the bus for memory/gate array IO writes. Then a raspberry pi running bare metal code recreates the gate array video logic. You get the benefit of HDMI out of the raspberry pi. There would be no need for the video memory reads that the GA needs. The one thing that would prevent this is if there was something specific in the CPC firmware that expects the GA memory reads, but I can't think of a reason why this would be so.


Here's Tk-Pie for reference:-
https://gitlab.com/victor.trucco/TK-Pie


I've been looking at the gate array schematics from Gerald(!) for clocks and rom switching. They are a very small part of the GA.


Thanks again for your advice.

If you are also supplying the 1MHz clock, then the Sound and keyboard would work too.

Bryce.
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Offline gerald

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Re: A Minimal Gate Array
« Reply #8 on: 17:48, 22 February 21 »
The gate array is doing a bit more than you think, but aside clock and rom enable it does :- DRAM handling. Without RAS/CAS/MWE/NCPU/CASAD_N, you have no RAM to work with, so you will not boot further than the first call that will use the stack.- Interrupt generation. This is done from HSYNC pulse and Z80 IRQ ack cycle and/or explicit write to the interrupt reset bit. You will need to handle that too or you won't have any keyboard (scan is done on interrupt) nor sound.- 244E signal. Without it, you can't write to the GA, so you can't select if ROM are overlaying the RAM or not.

etc ....
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Offline 40Crisis

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Re: A Minimal Gate Array
« Reply #9 on: 00:06, 23 February 21 »
Hello, one interesting project done for the CPC core of ZX UNO fpga project by mcleod_ideafix here:
https://www.zxuno.com/forum/viewtopic.php?f=59&t=1624
Sorry, but the topic is in spanish only.

To test his xilink fpga gate array core he replaced the real gate array with his FPGA substitute.
He says it works perfectly !

As far as I know the CPC gate array FPGA core source code is not available.
 
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Offline kolleykibber

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Re: A Minimal Gate Array
« Reply #10 on: 00:25, 23 February 21 »
Thanks Gerald, I knew it was worth asking.


I'll go back to looking for a 40010. Might be interesting to try and get a TK pie working on a CPC (with gate array )
Currently educating myself on DRAM access from this : http://www.massmind.org/techref/mem/dram/slide6.html. Anything else you would recommend?


40Crisis, thanks for that. There doesn't seem to be anybody offering FPGA boards for the cpc like the vLA82 and nebula for the spectrum. I'd have been a customer.
« Last Edit: 00:31, 23 February 21 by kolleykibber »
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Offline gerald

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Re: A Minimal Gate Array
« Reply #11 on: 21:13, 23 February 21 »
40Crisis, thanks for that. There doesn't seem to be anybody offering FPGA boards for the cpc like the vLA82 and nebula for the spectrum. I'd have been a customer.
Maybe one day  ;)


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Offline TotO

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Re: A Minimal Gate Array
« Reply #12 on: 21:51, 23 February 21 »
I have just removed the picture top layer! :o

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Offline Bryce

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Re: A Minimal Gate Array
« Reply #13 on: 23:00, 23 February 21 »
There's an SMD Z80 under the sticker? :D

Bryce.
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