Amstrad 6128 HAL/PAL16L8 chip

[jonnixx]

Hi,
I never ever did it.
Does anyone compare these?PAL Source Code from here: http://www.cpcwiki.eu/index.php/C%27t_512_KB_internal_RAM_expansion

D7D6 D0   D3   D4   D1   D2   NCAS A15  A14  GND  ;pin 1..10
CPU  A15S AMUX MUX  LCLK CAS1 CAS0 IOWR A14S VCC  ;pin 11..20
IF (VCC) /LCLK= D7D6 * /A15 * /IOWR               ;load external latch on OUT [7Fxxh],C0h..FFh
IF (VCC) /CAS0= /NCAS * /D4  +                    ;bank bit4=0, select bank 0..15 (CPU and CRTC)            
            /CAS0= /NCAS *  A15 +            
           /CAS0= /NCAS * /A14 +            
         /CAS0= /NCAS *  CPU

IF (VCC) /CAS1= /NCAS * D4 * /A15 * A14 * /CPU    ;bank bit4=1, select bank 16..31 (CPU at 4000h..7FFFh only)

IF (VCC) /A14S= /A14             +                             ;bank bit0
/D0  * D2 * /A15 + /D0  * D3 * /A15 +
/D0  * D4 * /A15

IF (VCC) /A15S= /A14 *  /A15 +               ;bank bit1
/D1  *   /A15 +
/D4  * /D3  * /D2 * /D0 * /A15 +
/D4  * /D3  * /D2 * /D1 * /A15
IF (VCC) /AMUX= /D0  *  D1  * /D2 * /D3 * /D4 * /CPU * /MUX +
A15 *  A14 * /D2 *  D0 *       /CPU * /MUX +
A15 *  A14 * /D2 *  D1 *       /CPU * /MUX +
A15 *  A14 *        D3 *       /CPU * /MUX +
A15 *  A14 *        D4 *       /CPU * /MUX +
/A15 *  A14 *        D2 *       /CPU * /MUX +  ;bank bit2
/A15 *  A14 *        D3 *       /CPU *  MUX    ;bank bit3

IF (GND) /MUX = /MUX      ;dummy (do not output anything on this pin)
IF (GND) /IOWR=/IOWR      ;dummy (do not output anything on this pin)


and I did it:
PIN  1   =      D7D6 ;

PIN  2   =      D0   ;

PIN  3   =      D3   ;

PIN  4   =      D4   ;

PIN  5   =      D1   ;

PIN  6   =      D2   ;

PIN  7   =      NCAS ;

PIN  8   =      A15  ;

PIN  9   =      A14  ;

PIN  10  =      GND  ;

PIN  11  =      CPU  ;

PIN  12  =      A15S ;

PIN  13  =      AMUX ;

PIN  14  =      MUX  ;

PIN  15  =      LCLK ;

PIN  16  =      CAS1 ;

PIN  17  =      CAS0 ;

PIN  18  =      IOWR ;

PIN  19  =      A14S ;

PIN  20  =      VCC  ;

!LCLK = D7D6 & !A15 & !IOWR;


!CAS0 = (!NCAS & !D4)  # (!NCAS &  A15) # (!NCAS & !A14) # (!NCAS &  CPU);

!CAS1 = !NCAS & D4 & !A15 & A14 & !CPU;   

!A14S = !A14 # (!D0  & D2 & !A15) # (!D0  & D3 & !A15) # (!D0  & D4 & !A15);

!A15S = !A14 & !A15 # !D1  & !A15 # !D4  & !D3  & !D2 & !D0 & !A15 # !D4  & !D3  & !D2 & !D1 & !A15;



!AMUX = !D0  &  D1  & !D2 & !D3 & !D4 & !CPU & !MUX #
                 A15 &  A14 & !D2 &  D0 &       !CPU & !MUX #
                 A15 &  A14 & !D2 &  D1 &       !CPU & !MUX #
                 A15 &  A14 &        D3 &       !CPU & !MUX #
                 A15 &  A14 &        D4 &       !CPU & !MUX #
                !A15 &  A14 &        D2 &       !CPU & !MUX # 
                !A15 &  A14 &        D3 &       !CPU &  MUX;

!MUX = !MUX;   

!IOWR = !IOWR;

Many thanks.John

[rpalmer]

!A15S = !A14 & !A15 # !D1  & !A15 # !D4  & !D3  & !D2 & !D0 & !A15 # !D4  & !D3  & !D2 & !D1 & !A15;


!AMUX = !D0  &  D1  & !D2 & !D3 & !D4 & !CPU & !MUX #
                 A15 &  A14 & !D2 &  D0 &       !CPU & !MUX #
                 A15 &  A14 & !D2 &  D1 &       !CPU & !MUX #
                 A15 &  A14 &        D3 &       !CPU & !MUX #
                 A15 &  A14 &        D4 &       !CPU & !MUX #
                !A15 &  A14 &        D2 &       !CPU & !MUX # 
                !A15 &  A14 &        D3 &       !CPU &  MUX;

The equations above are incorrect as you have no brackets to isolate the ORs and ANDs to make any meaning.
The equations should be of the form:
output = (signal1 & signal2) # (!signal1 & signal3)
and not
output = signal1 & signal2 # !signal1 & signal3
The first equation represents:
if signal1 then output = signal2 else output = signal3
The second equation has both signal1 and !signal1 and so you assume left to right evaluation and is compiler dependent.

rpalmer

[jonnixx]

Thank you very much.

[LambdaMikel]

The equations above are incorrect as you have no brackets to isolate the ORs and ANDs to make any meaning.
The equations should be of the form:
output = (signal1 & signal2) # (!signal1 & signal3)
and not
output = signal1 & signal2 # !signal1 & signal3

That's the same, due to operator precedence. See"2.2.2 Using Logical Operators" in the WinCUPL language reference
http://ww1.microchip.com/downloads/en/DeviceDoc/doc0737.pdf
So no, you do not need any brackets, and the unbracketed versions are compeltely equivalent to bracketed versions AFAIK.It does not harm to put in brackets though, for people not familiar with the operator precedence.

[Canou1967]

Hi
I want to make a PAL 6128 for experimental breadbording, can i use modern atmel chips?
If yes, can i use directly CPC6128.JED file? and what atmel model? ATF16LV8C?
Regards

 

[Canou1967]

ATF16V8B-15PU sorry

[eto]

can i use directly CPC6128.JED file?

this one here? https://www.cpcwiki.eu/index.php/PAL16L8

I haven't tried the JED file but the equations will definitely work. 

ATF16V8 works perfectly fine


One thing to add as you are doing some experiments. I have recognized one difference between the PAL and the replacement: while it will behave identically in the CPC, Q0,Q1 and Q2 have opposite behaviour. It is active low in the original PAL and active high in the replacement. 

[Canou1967]

Yes this ones.
maybe tips and tricks particularly at the time of the declaration of pins

can help me.

Thank you very much.