CPC max screen resolution?

[PulkoMandy]

The display clock of the CPC is 16MHz. The line period is the same, 64us. The result of this is: more pixels per line than if you used a 14.75MHz display clock. And the pixels are slightly squished vertically.


It's easy to see this if you get your CPC to display a circle, you will see an ellipse. You don't even need to use a ruler, but you can if you don't believe me.


You can change the display clock as much a you want without changing the line and frame periods. The result of this is horizontal resolution changes. And you can achieve a resolution as low as you want, I have hardware to display down to 8x288 and up to 1280x288 pixels on the CTM or any PAL compatible display this way.

[1024MAK]

With analogue CRT displays, in the 1980's, the normal method of "calibrating" the display was to display a suitable test signal / picture. Often a test card image, then adjust the various preset resistors, the physical position of the defection coils (including the wedges for this assembly) until the displayed picture matched the picture that was expected.

It's not hard to adjust the width of the image on a CRT in a 1980's set where there is a preset resistor, or even a user control. Manufacturers of normal TV's always set them up so that the transmitted TV picture filled the tube plus a bit more (so you lost a little bit of the edges of the picture). But with some monitors used with computers, the image was set up to stop just short of the edge of the viewable area.

So how many so called pixels can be displayed depends on how the line width has been set up. This also affects how square (or not) the computer generated "pixels" are.

Mark

[1024MAK]

@1024MAK: The signal that the CPC can actually produce is NOT a different matter because it's actually what we want to reproduce here in a FPGA CPC hardware emulator !
And for this we need at least 832 pixels (52µs active line as the standard), at most 896 pixels (56µs active line with the minimum HSYNC usable by the CTM (8µs))
(so the 800x300 frame buffer is not enouth)

It is a bit different, because the CRT controller chip used is not tied to the TV standard we are talking about. It can (with suitable inputs) produce other video standards (and non-standard) video outputs. Of course, the hardware of the CPC limits what you can actually do in practice.

So, for a hardware based device that has the same functionality as a real CPC, you need to decide if you want it to just be compatible with the known ways that the CRT controller chip is configured. Or emulate the full capabilities of both it and the rest of the CPC hardware.

Mark