Hi, I am studying all material I can get my hand on to understand every detail in my CPCs ..
One thing I cannot get my head around is the logic how the 32kb ROM is actually paged with individually lower and upper part.
Things I do understand:
The ROM has one ~OE line, which is connected to the expansion port (so does not play any role in normal ROM paging)
The ROM has the ~CE line, which is connected to the GateArray ~ROMEN line. So the gatearray selects the ROM.
Also the ROM is 32k so it has space for the 16k lower and 16k upper part.
The lower is simply addressed with A14 low. That is easy. The upper part is adressed with A14 high. As it does not have A15 &C000 will actually put the A14 hight and select the upper half of the rom.
Just from the ROM even &4000 would have the same effect and would also select the upper 16k of the ROM.
Okay now the things I do not understand:
There is the register in the Gatearray, that selects which part is banked into the address space. You can individually select LOWER and UPPER. But I do not understand how that is in hardware established.
The Gatearray does not see the address lines to understand which rom the CPC wants to address ... ... ohh .. funny on wirting this I now understand from the logic of the gatearray itself ...
It does see A14 and A15 which tells it clearly if it is either low (both off ) or high (both on). And combined with the internal enable disable registers and the questions is it ROM or RAM access from MREQ and RD this is generating the RAMRD and ROMEN signals to turn on either ROM or RAM based on this logic. And the address is then simply doing the rest of the magic.
So the boolean logic looks like that:
If (LROMEN & ~A15 and ~A14) & MREQ & RD)=ROMEN active and access to lower rom will hapen via the adderss (0xxx)
IF (HROMEN & A15 and A14) & MREQ & RD)=ROMEN active and access to higher rom will happen via the address (Cxxx)
On the other hand if LROMEN or LROMEN both low ... ROMEN will allways be low and access to RAM will happen via the supplied address
I love how pieces of logic come together.
So as I now (I believe) solved this gordian knot in my brain, can someone doublecheck my logic and confirm?
That sounds about right. The GA knows the ROM enable states and A15, A14 and sends out ROMEN or RAMRD as appropriate. The ROM only needs A14 (or it could use A15) to distinguish between which bank is needed.