Hi,
sorry for digging up a relatively old thread, but I've been asked quite often why my S-Video adapter (or any RGB to S-Video / VGA etc) doesn't work on the Spectrum +2/+3 although they also offer RGBS just like the CPC. My answer up to now was "I dunno", so it's been on my to-do list for quite some time and today I finally got around to checking it out. For those who haven't tried it, this is what you usually get on the screen if you try to connect the Spectrum via RGB to an adapter:
I was hoping that this was just a slightly off frequency sync signal, maybe just the negative pulse not going low enough or the pulse length too short/long. So first off, what does a proper sync signal look like. Here's the CPCs sync signal:
Mmmmm, nice clean sharp signal there with all the correct parameters. Let's take a look at the Spectrums sync:
Bloody hell, it's extrememly noisy, but the frequency, length and levels are near enough not to bother my adapter, which is quite forgiving on most parameters. For those who've noticed: The positive level is slightly higher than it should be in this screenshot because I was measuring on the ASIC side of R34. I could reduce that noise easily by adding a 1nf capacitor between Sync and GND, but that noise shouldn't cause a problem.
Then I took a look at "the big picture" and what the hell! There's a sync dropout every 20ms! ie: The sync is going low and staying there for 250µs (a normal sync pulse is around 4µs). This is what the dropout looks like:
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The normal sync signals can be seen on the left and you can see how long the dropout is in relation to them.
Unfortunately, this dropout is coming directly out of the ASIC, so there's no easy fix to this. The ASIC designer must have seriously messed something up on his timing. This is causing the mess on the screen, so without recreating a completely new sync signal from scratch, the Spectrum is just going to have to stay on CRTs for now.
A possible solution would be to create a sync signal from a seperate clock, but it would have to be pretty accurate and would have to be triggered from one of the "good" syncs from the ASIC, otherwise it would be out of phase. Any other suggestions are welcome?
Bryce.