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My CPC's and a novel 4MB expanded ram card!

Started by spen0007, 00:36, 28 February 20

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spen0007

Hi everyone

I made my first CPC compatible hardware – a 4MB ram expansion  :D  If you care to know why I did this read on.



A long time ago, a very long time ago, I was given a CPC664 for Christmas and I was always just bewildered by the concept of more than 64k memory on a Z80. That CPC6128 was just witch craft and DK'tronics were offering voodoo for sale.  I guess a lot of things were just bewildering to the 13 year old me!

Fast forward to last year when a school friend put a picture of a CPC6128 he'd bought from ebay on Facebook.  In one weird instant I knew I had to solve this childhood "16bit address bus can't address more than 65536 addresses" conundrum once and for all.

I bought a few broken CPC6128s on ebay, and a proper soldering station.  And a desoldering station. Alcohol too, both isopropyl and dilute ethanol. And a massive Thandar linear power supply. (note, if you ever consider getting all this stuff do remember it is all large and difficult to hide from your wife!).




With the schematics and the search button here I fixed 'em all.  I'm well stocked on nmos z80s, a lot of tiny ram chips, some pals.  I'm no longer afraid to dismantle a monitor and recap it - seriously it's easy, just be respectful of the anode cap when you discharge it. I have worked out you never ever use cheap nasty IC sockets, you only ever use turned pin plated items from a reputable supplier.  The cheap ones are just to give to people you don't like.  :o

.      .     .   


All this was lovely, I'd read more books on electronics, power supplies and IC datasheets than I knew existed but I still didn't know how to add more ram to a 16bit address bus and I'd still never built anything more complex than a piece of strip board with a couple of transistors on.

And then entered the hero of this story.  Revaldinho.  He published the old school 512KB ram expansion schematics, a CPLD (at the time I didn't know what that meant) ram expansion and a CPLD rom board.   Without that kick start I would know far less than I know today and none of the rest of this story would have happened.  Thank you Revaldinho – open sourcing your project provided the basis for everything I did CPC wise.

A lot of internet shopping later - CPLDs, sockets, a company in China called Seeed,  capacitors and switches, connectors and IDC type sockets.  Seriously I have no idea how I'm going to hide all this stuff. Ribbon connectors, a FD-1 drive.   :laugh:



I took an online course in Verilog so I could begin to understand how the 512kb ram expansion worked by analysing Revaldinho's source code.

I then set about building my own things  :)



.   

RAM boards 1.00 and 1.01 and a ROM board.

Nothing revolutionary, these are just Revaldinho's boards. I had to learn a bit about programmers and Xilinx ISE to get here but now I had access to a 464 with 1024KB ram and with a working C3 access mode.  It still gives me an uncomfortable feeling knowing the old z80 is locked in an electrical arm wrestle it can't win with the Xilinx 9536.  I almost want to make a little mezzanine card to hold the CPU and shield A15 with a resistor!

With a logic probe I understood the timings and the mechanisms once I'd figured out the damn logic probe.  Learning Verilog was easier.  :doh:



Here's the board I came up with, at version 1.04. To create a 4MB expansion using just a Xilinx xc9536 involved too many compromises. I moved up to xc9572-7 in a plcc84 3M socket.  This involved the coffee pot, and when v1.03 was a failure - the beer fridge!

.   .   

This is version 1.04.  We don't talk about v1.03.



I created a memory socket so that I could try various modules (512KB, 1024KB and 4096KB).  Modular was a good idea because I thought I'd break something at some stage or that I'd make a mistake in the board and only find out after I had mounted the SMT ram.   I ended up buying a WM-1 module from http://wilsonminesco.com/ and I used the same pin config on my "memsocket"



Other changes from the Revaldinho design.  I went for a dip 8.  No reason other than I happened to have some from a breadboard kit.  I didn't consider how many resistors this would mean soldering, but hey, I have a lot of switches for a lot of config options!

When plugged in to a cpc6128 you get 64KB base ram and 4096KB expanded ram, organised as sixty four 64KB pages with four 16KB banks per page.  Access is "Jarek" compatible and DK'tronics compatible for the first 8 pages (512KB). Modes C0-C7 are available on all pages.


.   

Eram-tst.bas shows the memory is connected.  Power draw is around 170mA.  The available 4Mb test, though in German, does pass.  All the 512KB tests pass too.



The nice part is what happens when we plug it in to the cpc464. 

   

As you can see, the last page of expanded memory is not found.  It's being used as the "Revaldinho shadow" of the base ram. If you haven't seen Revaldinho's card it maintains a shadow copy of base ram on a 464 and disables internal ram reads except by the gate array, the upshot is that memory access mode C3 is available on the 464  :)  The benefits of this new design over Revaldinho's 512KB cards are we no longer care whether the 64KB shadow page is at page 3 or page 7, both locations have disadvantages.  The shadow is now on page 63.



The total expanded ram available is 4032KB (sixty three 64KB pages).  It's enough to run Devilmarkus' AHA demo though you do lose a few frames.



Lastly we have Duke's C3 access mode test, it only tests the first 8 pages (512KB) but it does show C3 test being passed on a cpc464  :)
All in all I've enjoyed learning new things and creating something.  Thank you to people like Revaldinho who think open sourcing is valuable, you made this possible.

So what's next? 

•   I want to release all of this as open source project
•   Sell some CPC6128s
•   4MB expanded ram test tools?  Has anyone got any?  Does anyone have a C3 test that looks for 4MB expanded ram?
•   I'm going to test it a little more using the same test regime that Revaldinho used - this could still be an unfinished project
•   Eagle layout will be released
•   A .jed file will be released
•   Verilog source and constraints file will be released, when I'm confident it works fully
•   Support not provided.  If you try to build something like this I'll help if I am capable (I'm new to all this) and if I have time (I have a job to do)
•   If anyone wants me to program their own xilinx xc9572 I will do that by return post

When all that's done maybe a 32MB expansion and an external GPU with 4k output??  :picard:



edited to resize a couple of images so that the text on screen is easier to read.






ervin

All of that went over my head, but it was a very entertaining read!

Bryce

Quite a journey! You've learnt an aweful lot in a relatively short time. Now you just have to explain all that to the wife (and make her something useful so that she doesn't complain about all the equipment).

Bryce.

TotO

#3
Nice work and fun to do it to upgrade your CPC memory.  :) 

I found strange that you require a 80-pins XC9572.
Missing i/o to not use a 44-pins XC9572?
"You make one mistake in your life and the internet will never let you live it down" (Keith Goodyer)

spen0007

#4
Thanks Ervin.  Not a lot of point messing about with ancient technology without a sense of humour right?


I'm hoping my wife is happy - the path through the garage is now clear of engines, gearboxes and welders.  :laugh:


Regarding the 9572. 

This CPLD has to hold the logic for the shadow page, and the overdrive functions of wr_b, rd_b and a15
I settled on an 8 switch dip switch, so a few more pins used. 
I wanted the whole data and address bus in my verilog - more pins. (maybe not strictly necessary for a pure 4MB expansion but it will become clear)
I wanted 3 bits of GPIO which are on the board as a header (more on that maybe later). 
The memsocket is a 50 pin IDC socket and the WilsonMines 4MB module is 46 pin.  Those extra 4 pins are 4 more bits of address bus and I was only half joking about a 32MB board.  The option is there.
I'm also in the process of adding registers to the code which are accessible on the CPC bus.  The config is read from the dip switches at CPC reset and there is no reason these cannot be read or written from the CPC when up and running. It will also be possible to read the current page and bank config from inside the CPC.


All in all I was struggling to fit that in a 9536.  It could be me, this is the first outing in Verilog for me so I could have made some inefficient choices when it comes to how the resources are consumed.  Given the price difference between 9536 and 9572 and the future playing around I could do I went straight to 9572.

Sykobee (Briggsy)


Nice work!

So there's plenty of free space in the FPGA still?


I wonder what else you will think of sticking in there?

GUNHED

Quote from: spen0007 on 00:36, 28 February 20
•   4MB expanded ram test tools?  Has anyone got any?  Does anyone have a C3 test that looks for 4MB expanded ram?

Thanks for this very cool and very comprehensive post!  :) :) :)  Nice to see that you use my 4 MB test tool. There are also some 4 MB demos you can use to see it your great RAM expansion works (ok 64 KB of the 4 MB are missing, but this shouldn't be a problem).

If you want to know if RAM mode &C3 does properly work then you can use FutureOS and move its mouse arrow. In case you see no traces on screen then your &C3 mode works. The only one who could do archive this before on CPC464/664 was Revaldhino.

Great project!!!  :) :) :)
http://futureos.de --> Get the revolutionary FutureOS (Update: 2023.11.30)
http://futureos.cpc-live.com/files/LambdaSpeak_RSX_by_TFM.zip --> Get the RSX-ROM for LambdaSpeak :-) (Updated: 2021.12.26)

spen0007

Quote from: Sykobee (Briggsy) on 17:26, 28 February 20
Nice work!

So there's plenty of free space in the FPGA still?


I wonder what else you will think of sticking in there?


Technically the Xilinx 9572 is a CPLD, I found out that's a complex programable logic device.  I'm thinking of moving up to a FPGA for a future project.


I'm going to add some registers that are reachable by the z80 IO bus, the three GPIO pins might control the side of a 3.5 inch floppy or even the 8th missing bit on the parallel port.


I do want to add an ability to load a rom image in to ram and then tell the card, from basic, that this page / bank is now a rom and kick off the firmware romwalk function.  Should be possible and should have been done before?




spen0007

#8
Quote from: GUNHED on 17:32, 28 February 20
Thanks for this very cool and very comprehensive post!  :) :) :)  Nice to see that you use my 4 MB test tool. There are also some 4 MB demos you can use to see it your great RAM expansion works (ok 64 KB of the 4 MB are missing, but this shouldn't be a problem).

If you want to know if RAM mode &C3 does properly work then you can use FutureOS and move its mouse arrow. In case you see no traces on screen then your &C3 mode works. The only one who could do archive this before on CPC464/664 was Revaldhino.

Great project!!!  :) :) :)

Thank you for the eram-tst.bas tool, I would have attributed you in my first post had I known!

Time to learn FutureOS then.  :)

Bryce

Quote from: spen0007 on 11:50, 29 February 20

Technically the Xilinx 9572 is a CPLD, I found out that's a complex programable logic device.  I'm thinking of moving up to a FPGA for a future project.


I'm going to add some registers that are reachable by the z80 IO bus, the three GPIO pins might control the side of a 3.5 inch floppy or even the 8th missing bit on the parallel port.


I do want to add an ability to load a rom image in to ram and then tell the card, from basic, that this page / bank is now a rom and kick off the firmware romwalk function.  Should be possible and should have been done before?

Stick with CPLD's for a while first. While FPGA's have a lot more capability, most don't have the possibility to store their program like a CPLD does. The entire code is read in from an EPROM on power up. This makes the circuitry and development quite a bit more complicated.

Bryce.

spen0007

#10
Quote from: GUNHED on 17:32, 28 February 20
Thanks for this very cool and very comprehensive post!  :) :) :)  Nice to see that you use my 4 MB test tool. There are also some 4 MB demos you can use to see it your great RAM expansion works (ok 64 KB of the 4 MB are missing, but this shouldn't be a problem).

If you want to know if RAM mode &C3 does properly work then you can use FutureOS and move its mouse arrow. In case you see no traces on screen then your &C3 mode works. The only one who could do archive this before on CPC464/664 was Revaldhino.

Great project!!!  :) :) :)




I'm loving this :) .  It doesn't work as I expected.  FutureOS cursor is horrible without the C3 mode active.  With the C3 active via a shadow page the cursor is almost perfect, but not like it is in a CPC6128.  It looks like a timing issue.... A tiny bit of corruption, occasionally in the cursor.


Now the awesome problem.  When I reduce the voltage of the CPLD down to 4v the cursor is perfect!!  I tried bumping the voltage to 5.2v (ram and CPLD safe to 5.5v) and the cursor corruption got worse  :o .  The lower voltage limit before the CPLD fails is 3.56 volts.

At 4 volts:

<iframe src="https://player.vimeo.com/video/394646444" width="640" height="564" frameborder="0" allow="autoplay; fullscreen" allowfullscreen></iframe>


Watch what happens at 5 volts:

<iframe src="https://player.vimeo.com/video/394646412" width="640" height="564" frameborder="0" allow="autoplay; fullscreen" allowfullscreen></iframe>

I have absolutely no idea why reducing the voltage fixes this problem, not yet.  I could just introduce a voltage regulator and make the card always run at 4v, but I don't want to.    I cant wait to put a scope on A15 and a logic probe on the bus.  I want to understand what's happening here!


This adventure continues....

spen0007

Quote from: Bryce on 15:46, 29 February 20
Stick with CPLD's for a while first. While FPGA's have a lot more capability, most don't have the possibility to store their program like a CPLD does. The entire code is read in from an EPROM on power up. This makes the circuitry and development quite a bit more complicated.

Bryce.


My enthusiasm is unbounded!  I'll get there one day, I know I will. :)

GUNHED

WoW, that's looking like a hard kind of riddle. Hope you'll find out what's going on. Thumbs up! Great advances anyway. You'll make it.  :)
http://futureos.de --> Get the revolutionary FutureOS (Update: 2023.11.30)
http://futureos.cpc-live.com/files/LambdaSpeak_RSX_by_TFM.zip --> Get the RSX-ROM for LambdaSpeak :-) (Updated: 2021.12.26)

spen0007

#13



:o It took a bit of finding.  It looks like the best workout for any 464 memory expansion is FutureOS' cursor!!


I played about with a few different CPUs and yes each CPU behaved slightly differently.  The cursor would always be corrupted at 5volts but some CPUs recovered earlier than others as I dropped the volts.





Then I went for the logic probe.   :doh:  Setting it up takes ages, then it takes me ages to remember what it's trying to tell me.  I think the software developer for the probe just doesn't like humans.





There was a little bit of a discrepancy in how ramdis was asserted on my card vs a revaldinho card.  I had to adjust the trigger levels down quite a bit but the wave form looked ok, just half a volt lower.  Still enough to trigger TTL though.







Once I'd plugged in the platform cable I made a new firmware to utilise those GPIO pins I set aside.


I used a GPIO pin on the card which I'd set aside for random purposes, I gave myself an external rising edge when I backdrove A15 so that I could look closely at what was happening during the A15 overdrive event.


Making firmware takes a lot of computers.  :picard:  A mac to write it, a windows  >:(  machine to program it and a 464 and 6128 to test it.





To cut a long post short A15 didn't look like it did on Revaldinho's card during the overdrive event.  I'm using two CPLD pins just like the 512MB card does so acting on a hunch I moved my overdrive capability to a different part of the CPLD.  I think I was using two pins but the timing wasn't perfect, I don't know what the maximum propagation delay is between macrocells, or possibly my second hand xc9572 might have a bad drive on that output?  Anyhow moving to pin 52 as my sole source of A15 overdrive worked a treat. 

For the seriously bored of you here's an exciting video of a cursor moving on an 8 bit computer  ;D



<iframe src="https://player.vimeo.com/video/394814588" width="640" height="360" frameborder="0" allow="autoplay; fullscreen" allowfullscreen></iframe>


At 5 volts it will run FutureOS with a perfect cursor on a CPC464 and provide 4032KB ram.  It'll even run from the CPC expansion bus power.


Funnily enough the Pony Truck reward beer also runs at 5 volts.....  Good night all.














GUNHED

Awesome!!! Congratulations!!! You made it!!!  :) :) :) :) :) :) :)
http://futureos.de --> Get the revolutionary FutureOS (Update: 2023.11.30)
http://futureos.cpc-live.com/files/LambdaSpeak_RSX_by_TFM.zip --> Get the RSX-ROM for LambdaSpeak :-) (Updated: 2021.12.26)

GUNHED

Hi, I just had contact to an user of the KC compact, the middle German clone of the CPC464. We are curious if this great 4 MB expansion would work with the KCc too.

Other expansions have the same problem with the KCc as with the 464 regarding RAM mode &C3. Well, I don't know if Revaldhinos RAM expansion establishes &C3 on the KCc properly. Does anybody know?
http://futureos.de --> Get the revolutionary FutureOS (Update: 2023.11.30)
http://futureos.cpc-live.com/files/LambdaSpeak_RSX_by_TFM.zip --> Get the RSX-ROM for LambdaSpeak :-) (Updated: 2021.12.26)

spen0007

I've never seen a KC compact.  I have no idea what would happen.

revaldinho

I opened an issue against the KC-compact on GitHub for my original card.


https://github.com/revaldinho/cpc_ram_expansion/issues/2


This was based on a report from one user with an early version of the CPLD firmware. Later versions are more robust at lower voltage, but essentially the logic is the same.


I think the summary is that the Dk'Tronics mode works fine, but surprisingly didn't need the Z80 overdriving to be enabled in order to work. The shadow mode though (FutureOS) didn't work.


The KC-Compact schematics are available on the CPC-Wiki here, but I haven't looked into this in any more detail and of course I don't have a KC Compact to try things out on anyway.




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