Replacement Z80A CPU

Started by darkhalf, 16:58, 18 May 21

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MaV

The Z80B and Z80H are NMOS chips which were produced with the same chip mask as the Z80A, so there should be no problem using them instead of a Z80A.
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SerErris

And again - without changes to other components you will not gain any benefit from it. 

The GA is clocking the CPU with 4Mhz and a Memory cycle is allways 4 ticks from the clock. So actually the CPU needs 1µs per memory read and also 1µs for anything internally (4 ticks per Mcycle at 4Mhz ~ 1M Mcycles per second). 

So the CPU in the CPC (and actually the Z80A) is working in memory cycles and having multiple of those per command. Simple ones take only 1M cycle (NOP) more complex can add up pretty large amount of cycles.

For the CPC it is allways 4 cycles so all the commands are calculated in NOPs (1M = 1NOP) and the most expensive ones are 7 NOPs, like  RRC (IX+dd). 

So where a NOP takes 1µs to execute, a RRC (IX+dd) takes 7µs. 

The CPU is very closely aligned to the gatearray as the GA needs to read from the memory all the time (2 bytes per µs). That is why actually the GA is in control of the clock AND the access to memory. So just increasing the CPU clock frequency will not solve anything. 

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WacKEDmaN

i wonder if an option could be added to the fpga gate array to allow it to run double speed..

eg it clocks the cpu at 8mhz..getting 2mhz on the mcycles... 
(most 4mhz z80s will run at 8mhz perfectly fine with only a slight increase in temp..i do it on my z80-mbc2)

Bread80

Quote from: WacKEDmaN on 22:28, 02 November 22i wonder if an option could be added to the fpga gate array to allow it to run double speed..

eg it clocks the cpu at 8mhz..getting 2mhz on the mcycles...
(most 4mhz z80s will run at 8mhz perfectly fine with only a slight increase in temp..i do it on my z80-mbc2)
The major limitation with that is the RAM access times - both the RAM itself and the multiplexers (for video/CPU address to RAM). There might also be some issues with hardware and I/O. I don't the timings on all those chips.

In theory if you sort that then you could just divide down the crystal and use that instead of the PHI signal coning from the GA. You still get a lot of the cycle where the GA is pausing the CPU while it accesses memory.

My preference would just be to design a new M/B with SRAM and faster multiplexers, then rework the signal timings to work with them.

PulkoMandy

There were some experiments with replacing the clock in the CPC, you can go up to 6MHz without problems. Going higher than this you start to run into problems with the ROMs, so you need to replace these with more modern and faster ones.

Of course, you need to adjust a few other things: CRTC settings are incompatible (each character will be narrower so you need more of them to keep the same timings) and floppy timings would be off as well. But if you manage to run at 8MHz, you get exactly the right timings to use HD floppies  8)


TotO

Exactly. With a 32MHz Gate Array, you got a nice computer close to the Atari ST.

- 8MHz CPU
- 2MHz AY sound
- HD Floppy Drive
- 320x200 with 16 colours (32K page)
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