So now to the great thing about the Vortex controller. Everything is the same like with the CPCs FDC765, the only differences are the addresses and the fact that the Vortex FDC765 can physically connect four drives - and that's awesome, that way one can use 3", 3.5" and 5,25" at the same time.
Now the FDC status for Amstrad is &FB7E, and for Vortex it is &FBF6
The FDC data port for Amstrad is &FB7F, and for Vortex it is &FBF7
Well,in that case, i think that board will work with Vortex without needing any modifications at all!
You see, the address decoding i'm using (at least for serial port & FDC emulation), is based in checking
ONLY specific address bits, and NOT the hole 16bit address (the hole address is needed only for the ROM emulation, which is activated by a different logic: check"ROMenable"=rom read signal, along with address bit 14)!
I'm doing this, mainly to maximize speed and efficiency,as the execution of an Address bit check in PIC's MCU code, is made in ~0,12uS, whereas, checking specific full address it would need ~1uS! Moreover,Address bit check, defines
address ranges and NOT specific addresses, which makes finding of the device (for which the I/O request occures), MUCH easier and faster!
To be more specific,according to
this , whenever an I/O request occures, i only need to check Address bit10 (=&FBxx), in order to define if the request is intended for Expansion Peripherals (which, fortunately
includes BOTH serial interfaces AND FDC controller! 
) .
After that, i check A5 (Address bit5) to determine if the request is intended for the 765 FDC (&FBFx=> A5='1') or the serial port (&FBDx=>A5='0') , and if I/O request is for 765FDC, i finally check A0 ,to see if its status register port (&FB7E=>A0='0') or data register port (&FB7F=>A0='1'). Note also that all the above bit checks, are executed in ONLY ~1/3 of a microsecond!
And now, here is the "MAGIC":
If you check the address ports of the vortex, you will see that
EXACTLY the SAME logic can be applied for Vortex too:
Vortex FDC status register port= &FBF6 => A10='0', A5='1', A0='0' EXACLTY like with 765 FDC!
Vortex FDC data register port= &FBF7 => A10='0', A5='1', A0='1' EXACLTY like with 765 FDC!
So, most probable
USIfAC II will emulate Vortex floppy controller too!
[UPDATE] I 've modified the circuit to include A5 bit in address decoding logic, so now, only one bit check is required in the code ,and Amstrad doesn't pause at all when FDC emulation is disabled! With previous code+circuit there was a minor delay ~0,5-1%, in Disk drive function, because of the 3bit checks made in software, which cause ~0.5us delay for every FDC I/O request, also some copy protected game had dfficulties loading from gotek/floppy drive (for example, original dragon ninja image nedded ~33sec to load instead of normal ~23secs needed) ,obviously because of this minor delay, but now everything is fixed + overall performance was slightly increased too!
