SNDh2AYc - iNViTRO for Benediction Coding Party

[Targhan]

Yes, the DMA allows you to buffer AY values, so that you the player can fill it, and then is done, and you have all the rest of the CPU to do your game/effect. This is also what allows Grim (in the Semilanceata demos: Sappy and Seminoisin), and also Power (Heat Beats demo), featuring samples and MOD playing, to mix effects with more elaborate sounds.

Doing that on a real CPC is from ultra-bothersome to impossible, depending on what you want to achieve.

[andycadley]

The DMA has 3 channels that each run a sort of mini program, without the CPU needing to be involved. Each can execute one  command per scanlines, so you can effectively write to 3 AY registers every 64us.

The advantage is twofold: 1) It can do this without the CPU being involved and the timing can be very precise. 2) Three arbitrary register writes is faster than the CPU can ever do, so you can feed the AY more data. 

[HAL6128]

Oh, thank you, if I understood it right it's similar to digitizing a sample with a higher bit rate and therefore it's more precise (maybe, not a good comparison because there's more behind)
How is the DMA being triggered?

[andycadley]

Partly. On a normal CPC, if you dedicate all the CPU time to it, you might be able to play back at sample at maybe 12KHz.. Using the DMA, the Plus can push three 15KHz samples with almost no CPU intervention. A higher sample rate means better quality playback.

But that's not the whole story. The DMA doesn't just play samples. You can also create DMA lists that just play back standard AY style music. The quality isn't necessarily better in that case (although some effects may be easier to achieve) but again you gain the benefit of offloading some of the audio work giving the CPU more time.

Another trick Plus coders seem to love is to take advantage of the timing capabilities of DMA lists to generate CPU interrupts at tightly controlled intervals - giving a much more flexible mechanism for pulling off raster bars etc (and proving coders will find all sorts of exciting ways of utilising hardware in unintended ways!)

As to how it is triggered each channel has a program pointer and a pause prescaler register in the ASIC where you can set where the DMA list starts in RAM for that channel (the pause prescaler allows for longer DMA PAUSE instructions that normal by effectively multiplying it by the scale value first). Then there is a single control register that can start or stop all the lists at once, to help keep everything in sync.