GX4000/Plus Range : Did Amstrad Miss The Point ?

dragon · 23:34, 19 November 11

o o.k.Then maybe is necessary editing the wiki

"
Reducing Horizontal BLanking could cause another internal conflict when using DMA lists.In the worst case , this conflict can cause irreversible damage to the ASIC."
http://www.cpcwiki.eu/index.php/ASIC

TotO · 23:35, 19 November 11

Quote from: Bryce on 23:14, 19 November 11
Such rumours are absolute bullshit. There is definitely no way to destroy an ASIC with software.

Like that?

Spoiler: Show

MacDeath · 04:21, 20 November 11

Would overheat count as destroy ?

I mean, Asic sure is unefficient and buggy... but is this robust and solid ?

TFM · 07:03, 20 November 11

Quote from: MacDeath on 04:21, 20 November 11
Would overheat count as destroy ?

I mean, Asic sure is unefficient and buggy... but is this robust and solid ?

Is it really buggy? I never had prolems and I never found a bug. However, every complex chip can be programmed in a way that causes problems. For example the CRTC, by programming it you can bring the CPC to a state where only a hard-reset allows to continue work. But what are the bugs of the ASIC?

fano · 08:58, 20 November 11

Quote from: TFM/FS on 07:03, 20 November 11
Is it really buggy? I never had prolems and I never found a bug.

Try to use DMA channel 0 interrupts with PRI interrupts , you'll have one

(i loose some hairs on this one when working on RD128+)

dragon · 13:37, 20 November 11

QuoteTry to use DMA channel 0 interrupts with PRI interrupts , you'll have one (i loose some hairs on this one when working on RD128+)

Are you sure they not fix the problem?.I remember read,Exist different version of asic,With different colour border,when you turn on the computer without cartridge.

Maybe in one on these version it fix anything.

fano · 14:47, 20 November 11

Quote from: dragon on 13:37, 20 November 11

Are you sure they not fix the problem?.I remember read,Exist different version of asic,With different colour border,when you turn on the computer without cartridge.

Maybe in one on these version it fix anything.

Maybe , i was not aware about this.I didn't check this on my 5 Plus , only one.
But i saw a Plus asic with 12K pixel buffer instead of 4K for the actual one and vectorised instead of fixed sprites but i woke up , that was just a sweet and wet programmer dream

SyX · 18:50, 20 November 11

You need to add at your dream to be able to change the priority between sprites and background ... (we could use it for a simply parallax scroll

)

dragon · 13:48, 21 November 11

QuoteMaybe , i was not aware about this.I didn't check this on my 5 Plus , only one.

I found it,I read here:

http://www.cpctech.org.uk/docs/cpcplus.html

sigh · 22:58, 01 December 11

GX4000/Plus Range : Did Amstrad Miss The Point ?

I think that switching on a machine released in 1990 only to be welcomed with "1985" on the splash screen is definitely a bad move! (or was it 87? Haven't switched mine on in a while...)

If he was on the apprentice - he'd be fired!

TFM · 21:56, 02 December 11

Actually on a 464 Plus or 6128 Plus it was 1985.

However on a GX4000 ist was "Burning Rubber" 1990.

andycadley · 21:33, 06 December 11

Quote from: fano on 08:58, 20 November 11
Try to use DMA channel 0 interrupts with PRI interrupts , you'll have one (i loose some hairs on this one when working on RD128+)

Curious, I've never come across that one and I've mixed DMA channel 0 with the PRI before. Are you sure it wasn't the IM2 auto-clear interrupt bug?

fano · 21:54, 06 December 11

Quote from: andycadley on 21:33, 06 December 11
Curious, I've never come across that one and I've mixed DMA channel 0 with the PRI before. Are you sure it wasn't the IM2 auto-clear interrupt bug?

I am sure that was this bug , this is a known issue.Did you use DMA 0 to raise interrupts ?

andycadley · 00:14, 07 December 11

Yep, it works as long as you keep the auto-clear feature turned off and manually reset the correct interrupt.

fano · 01:14, 07 December 11

So , in IM2 mode , Z80 will jump at channel 0 address instead of raster address randomly.

I posted something about this in 2009 at CPCrulez : http://cpcrulez.fr/forum/viewtopic.php?f=4&t=3813 (sorry , French only)

And there is a little program that show well this bug (need Asic unlock)
http://quasar.cpcscene.com/doku.php?id=assem:asic#listing_im_2_sur_cpc_plus

Type WHILE 1:? PEEK(0):WEND after ran the program , you'll have something else than always 255 that shows int branching is not correct.

andycadley · 06:34, 07 December 11

Yep, your code has bit 0 of the ASIC IVR (&6805) set to 0, so the ASIC attempts to auto-clear the sound channel DMA interrupts. This is the buggy behaviour, which is probably why info on this was removed in v1.5 of the Arnold spec. If you set bit 0 to 1 and then manually clear sound channel interrupts by setting the relevant bit in the DCSR.

fano · 08:50, 07 December 11

You mean the vector bug doesn't occur with auto clear disabled ? this sounds interesting , i'll check that.

andycadley · 09:54, 07 December 11

Nope, it works fine with auto clear off. I found this one ages ago and between Kev Thacker and myself we pretty much had the details of exactly what does happen worked out. I think Kev actually had some test code as proof at one point. I'd have to go rummaging through the archives of csa8 to find it though, as I can't see any docs on this on his site.

Executioner · 01:24, 17 December 11

Quote from: andycadley on 09:54, 07 December 11
Nope, it works fine with auto clear off. I found this one ages ago and between Kev Thacker and myself we pretty much had the details of exactly what does happen worked out. I think Kev actually had some test code as proof at one point. I'd have to go rummaging through the archives of csa8 to find it though, as I can't see any docs on this on his site.

Did you ever find any documentation on it? I'd like to check the bug occurs as expected in WinAPE.

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GX4000/Plus Range : Did Amstrad Miss The Point ?