Say you have a multicartridge for CPC+ with 8 ROMs

[dragon]

Ohhh,i read a very old post in comp 8 bits group.Cliff explain,steve gane search implement hardware sprites collision.But the design ocupped 10k gates in the asic.(out of space limit).


So maybe the sprites are useless,because amstrad can't implement the true full desing of plus range,only a partial version of plus design .

[TFM]

So maybe the sprites are useless,because amstrad can't implement the true full desing of plus range,only a partial version of plus design .

Not at all 
- You still can use the sprites
- Collision dedection in software (Z80) can be as short as 100 bytes or so - and it's quick    You can read all X and Y positions of the sprites from RAM (memory mapped part of the asic) and you know their size. So it's pretty simple. However I can hardly imagine that so much gates would have been needed.

[Bryce]

Easily! 10K of gates for collision detection isn't that much, when you consider how many pixels need to be monitored. Each pixel would need its own gates.

Bryce.

[TFM]

Easily! 10K of gates for collision detection isn't that much, when you consider how many pixels need to be monitored. Each pixel would need its own gates.

Bryce.

Why not just comparing X and Y positions of all sprites to each other? Sure, you do have to calculate their size in X and Y too (16, 32 or 64 pixel). That's all you need.

Why to compare to pixel on the screen? What do I miss?

(Sprite collision is the collision of sprites right? Not background?!?)

[Bryce]

In software yes, but in hardware these X and Y don't actually exist. It's just comparing bits with bits in real time. Hardware is lower than the lowest level of software.

Bryce.

[TFM]

Well, yes, but they do create X and Y coordinates in realtime, so why not using them. It's just a CP command   Doesn't matter, my knowledge about VHDL and FPGAs is very limited.

[arnoldemu]

Easily! 10K of gates for collision detection isn't that much, when you consider how many pixels need to be monitored. Each pixel would need its own gates.

Bryce.

would it not be better to do some kind of xor. the hardware knows when it's clocking out the sprites and which has priority, so it should be able to do this and set a signal.

[dragon]

I think their problem is the old cpc cost down.Instead made the pre-asic with all crtc ppi stuff.And later reuse it to the plus.They can use a external ppi an crtc,leave these logic gates to hardware sprite collisión and other stuff..And later when is more cheap made a new asic with all integrated.The original gate array have 2000 gates,the plus 18000,but how many gates cost integrated the crtc the ppi etc...?

[TFM]

Agreed, for compatibility reasons