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avatar_Alexandre Rouma

CPC 464 blue sceen problem

Started by Alexandre Rouma, 10:24, 29 July 15

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TFM

#75
Quote from: Morn on 18:13, 30 July 15
Yes, saying the C64 was better might be true


Bullcrap! The CPC CPU is four times faster (4 MHz compared to 0.9 MHz), the CPC has 27 instead of only 16 worn out colors, the CPC can play music in stereo not only mono, the CPC has 640 pixel in X while the c64 only has 16, the CPC has flexible software sprites instead of predefined hardware crap sprites, the CPCs hardware scrolling is way more quick than on CPC. SID sound suxx anyway and the CPC is just fecking way more cool! 8)


Of course everybody shall be burned beyond recognition who tells that any other 8 bit system is better than the CPC. ;D
TFM of FutureSoft
Also visit the CPC and Plus users favorite OS: FutureOS - The Revolution on CPC6128 and 6128Plus

Morn

True, TFM, but if you e.g. demo Out Run both on a CPC and C64, the C64 version looks and sounds reasonably fast and fun (even if the colours are ugly), while the CPC version looks like, well, we all know what it looks and plays like.

And then there was e.g. speech output in Ghostbusters which you could actually kind of understand on the C64. Quite a few things that wowed people in the 1980s.

From a modern perspective, the C64's text mode graphics, its 6502-like CPU with its zero page, the memory mapped registers, and that ancient Pet Basic are just weird of course. Speaking from 2015, I think we can safely say the wow factor of the 1980s has gone out of the C64.  :D

McKlain

Stop comparing the SID with the AY, please. You can't compare an analog synthesizer on a chip with a sound generator wich produces square waves  :laugh:

Bryce

#78
I still think it's the RAM. All chips might be outputing data, but is it the correct data for all addresses? Without a logic analyser that's hard to test.

Bryce.

Edit: And stop talking about shite C64s and their SIDs, this thread is to fix Alexandres 464. Take that discussion to an appropriate thead (that I can ignore :)).

TFM

The BASIC prompt can be there even with failures in 6 of 8 RAM chips. The native CPC OS needs only the first page (for the RST's) and few RAM for the JUMP alley / system RAM (around &A800-&BFFF). Broken RAM will not always repeat the effect, or only show two effects.
I bet on the GA (/ CRTC) or maybe even the Z80. But the Z80 has a socket, one could replace it more easy and see what happens.

TFM of FutureSoft
Also visit the CPC and Plus users favorite OS: FutureOS - The Revolution on CPC6128 and 6128Plus

Morn

Quote from: TFM on 22:17, 30 July 15
I bet on the GA (/ CRTC) or maybe even the Z80. But the Z80 has a socket, one could replace it more easy and see what happens.
The problem is that the OP does not have any replacement parts like an Z80 available. He would have to order it e.g. on eBay, only to possibly find out the part he ordered does not fix the problem.

Bryce

Quote from: TFM on 22:17, 30 July 15
The BASIC prompt can be there even with failures in 6 of 8 RAM chips. The native CPC OS needs only the first page (for the RST's) and few RAM for the JUMP alley / system RAM (around &A800-&BFFF). Broken RAM will not always repeat the effect, or only show two effects.
I bet on the GA (/ CRTC) or maybe even the Z80. But the Z80 has a socket, one could replace it more easy and see what happens.

They are 64Kbit x1 RAMs, so every chip stores 1 bit of every address. Basic couldn't possibly load if even 1 chip was dead.

Bryce.

Joseman

Quote from: McKlain on 21:48, 30 July 15
Stop comparing the SID with the AY, please. You can't compare an analog synthesizer on a chip with a sound generator wich produces square waves  [emoji23]
Personally I don't like the dull sounds of the sid, I prefer the AY over the sid without doubt.

Bryce is right, let's talk about the CPC and not about a computer-toaster wannabe

McKlain


robcfg

To be fair, the SID is a much better sound chip, but it's also true that it usually sound like playing a violin with a saw. The Atari Pokey chip has a very special 'metallic' sound which I love.

When it comes to the machines, the C64 scene is super productive, and despite the specs, they create wonderful demos and games.

Now, off with the offtopic and more CPC coding! XD

Alexandre Rouma

I'm going to build a logic analyser with my arduino.
What is the protocol for the RAM chips ?

If it's possible I will make a tool with the arduino to automaticly test the CPC and I will post it on the forum  :D
The fitnessgram pacer test is a multi-stage arobic capacity test

Bryce

#86
RAM chips don't have a protocol. It's a parallel TTL bus.

Personally I wouldn't go to the bother. Grab a full set of 4164s = 10 x KM4164B-10 Samsung 64K x 1Bit Dynamic RAM - DIP16 | eBay and a few sockets and just swap them all.

Bryce.

Alexandre Rouma

but how can I read the data out, is it Serial data ?
The fitnessgram pacer test is a multi-stage arobic capacity test

Bryce

To read it properly you'll need to do "state analysis". That means that your logic analyser is synchronised with the CPC clock. Your arduino will need to have an interrupt routine triggered by the CPU clock that reads the 8 data lines once per clock cycle. Each of the data lines will either have a 5V signal (1) or 0V signal (0) each cycle. By gathering this data at startup you can tell whether the Firmware (known data) is being sent to the CPU.

Bryce.

Alexandre Rouma

So:

int DATApin = 2;
int CLKpin = 3;

void setup() {
  pinMode(2, INPUT);
  pinMode(3, INPUT);
  Serial.begin(9600);
}

void loop(){
  int data[8];
  int index = 0;
  if (index < 8){
    if (CLKpin == 1){
      data[index] = digitalRead(DATApin);
      index++;
    }
  }
  else{
    index = 0;
    int dataOUT;
    for (int i; i < 8; i++){
      bitWrite(dataOUT, i, data[i]);
    }
    Serial.write(dataOUT);
  }
}
The fitnessgram pacer test is a multi-stage arobic capacity test

Bryce

I've never touched Arduino, so I can't confirm your code, but it looks to be going in the right direction. The Arduino will have to be running relatively fast, because it needs to do all that in the time of one Z80 cycle.

I've done a small diagram to explain a bit about how the CPC RAM works.

The CPU sets the address (on the address bus) it wants to read or write from RAM, the address bus is connected to each RAM chip. The /WR signal from the CPU decides which of the buffers is enabled (direction of data). The 8 data bits coming from CPU then each go to one of the 8 RAM chips and is then stored at the correct address. So each chip is just storing 1 bit of every address.
For reading, the exact same thing happens, just the other buffer is used. The reason for this is because the RAM ICs have a seperate Data In and Data Out pin, which you can't connect together, unlike the CPU where the same pin is used for input and output. The best place to start measuring the data is directly at the CPU (because data in both directions will be read), but later you might need to check input and output data seperately to check whether a buffer is possibly damaged. I've only shown one of the 8 Data Out lines so that the drawing isn't too cluttered.

For possible pedantic readers: Yes, I've left quite a few details out to keep it simple.

Bryce.

Alexandre Rouma

Ok, thanks, I'm going to try that  :D

Also, do you think my arduino DUE will be fast enought (84Mhz, ARM core)
The fitnessgram pacer test is a multi-stage arobic capacity test

gerald

Quote from: Bryce on 15:14, 31 July 15
For possible pedantic readers: Yes, I've left quite a few details out to keep it simple.
:o

Quote from: Alexandre Rouma on 15:20, 31 July 15
Ok, thanks, I'm going to try that  :D

Also, do you think my arduino DUE will be fast enought (84Mhz, ARM core)
With assembly code, maybe. With C/C++ and arduino library, it will be tough  :( .
Read/Write cycles can be as short as 350ns, and can repeat every microsecond.
This is roughtly 30 instruction cycles for detection and capture, and 83-30=53 for processing that capture before being ready for next.


Alexandre Rouma

Or maybe though the parallel port of a computer ?
The fitnessgram pacer test is a multi-stage arobic capacity test

gerald

Quote from: Alexandre Rouma on 16:20, 31 July 15
Or maybe though the parallel port of a computer ?
Unlikely to be faster.

Also, the arduino due has 3.3V IO and the CPC 5V may just kill them !

I would suggest you to first clean the main board.
Then remove the socketed IC (Z80 and 40010 GateArray) and check for oxydation on the socket.
I am not convinced that the RAM is dead.


Alexandre Rouma

#95
what I mean by "though the parallel port" is with my Operating system

I made my own OS so I can directly Access the IO of the CPU (Now I'm just using it to conntrol a robotic arm, but with a few modifications, I could have the full 3.4Ghz of the CPU to read the data out of the RAM chips)

I will clean it tomorow and I will check for corrosion. Do you have any tip to remove corrosion if I find some ?
The fitnessgram pacer test is a multi-stage arobic capacity test

pelrun

Quote from: gerald on 21:33, 31 July 15
Also, the arduino due has 3.3V IO and the CPC 5V may just kill them !


Make that *will* kill them. You'd need level conversion for every signal, and there's a *lot* of them. A series resistor on each line might be sufficient (if all you're doing is input), but you'd be relying on the ESD diodes in the ARM mcu to do clamping, and that's not the best idea. Better would be something like a few 74xx245 voltage translating buffers, or replacing the Due with a board that's 5v tolerant in the first place.


(I made a shield for my minispartan fpga board with a bunch of serial IO expanders to do it, but I need bidirectional IO...)

Alexandre Rouma

First, Sorry for not being here for a LLLLLOOOOONNNNNGGGGG Time. I've been on vacation then got back to school  :)

I have some good news, I finaly got a new Oscilloscope ! It's a rigol ds1054z with all options enabled (CRACK 8) )

I check all the rams and I'm getting a changing paralelle signal on the data pins. Would it help if I post the data ?
The fitnessgram pacer test is a multi-stage arobic capacity test

Fessor

#98
The Pattern on the Screen is fascinating.
5 Blocks white, 5 Blocks blue.
If  translated to Screenadresses and converted to binary results in a Pattern with the Problem Occuring at the third Bit of the Address. (D3/A3)
But, wouldnt it give an result as Bitpattern as if the bit were set or not set if the RAM is defective? Bits for D3 are stored in IC117...


Alexandre Rouma

Well, sorry for being disconnected for soooooooooooo long  :) I had a LOT of school work so I couldn't play around with my CPC  :'(
Now, I have a proper scope (a DS1054Z) so I can test every thing. I'll post screen shots of the scope, frequencies and data I find :)

Sorry again  :'(
The fitnessgram pacer test is a multi-stage arobic capacity test

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