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Using a 30pin SIMM (256KB) as RAM replacement?

Started by eto, 09:24, 29 August 22

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eto

I have a CPC6128 where the RAM of the second bank is not working properly. I was wondering if I can replace the chips with a 30 pin SIMM, which is using 41256 RAM chips. I thought it would be straight forward, as the 41256 chips are basically compatible with the 4164, however I now recognised that the internal chips have separate pins for data in and data out, which SIMMs don't have. 

Now I am wondering, if there is a way, how I can connect the data lines. Any hints appreciated. 


SkulleateR

@eto 

Don't want to stop you if you want to try the SIMM solution but if you are in need, I got enough 4164 DRAM here ;)

TotO

Quote from: eto on 09:24, 29 August 22I have a CPC6128 where the RAM of the second bank is not working properly. I was wondering if I can replace the chips with a 30 pin SIMM, which is using 41256 RAM chips. I thought it would be straight forward, as the 41256 chips are basically compatible with the 4164, however I now recognised that the internal chips have separate pins for data in and data out, which SIMMs don't have.

Now I am wondering, if there is a way, how I can connect the data lines. Any hints appreciated.


On the SIMM-30, DI and DO are linked. You can't use it without extra electronic. (Apple Mac SIMM use DI and DO). You can unsolder the 8x IC and put them on the CPC instead. Link the pin1 (A8) together to GND or VCC next.
"You make one mistake in your life and the internet will never let you live it down" (Keith Goodyer)

eto

Quote from: SkulleateR on 09:55, 29 August 22@eto

Don't want to stop you if you want to try the SIMM solution but if you are in need, I got enough 4164 DRAM here ;)
I have to admit, I do have a few 4164 replacement chips here, but I became curious ;-) I would then also try to make use of the full 256K. 

TotO

Quote from: eto on 10:13, 29 August 22I have to admit, I do have a few 4164 replacement chips here, but I became curious ;-) I would then also try to make use of the full 256K.
Sure, using 4164 is better.

To make use of the full 256K you have to handle the DRAM refresh and the bank switching to access the extra memory. If your SIMM is on the CPU bus, you can use it. Only the GA bus require DI/DO to be separated.
"You make one mistake in your life and the internet will never let you live it down" (Keith Goodyer)

eto

Quote from: TotO on 10:17, 29 August 22To make use of the full 256K you have to handle the DRAM refresh and the bank switching to access the extra memory. If your SIMM is on the CPU bus, you can use it. Only the GA bus require DI/DO to be separated.
So connect the 8 data input pins of the second ram bank to D1-D8 of the SIMM? No need to bother with the DI/DO stuff? That would make things easier. 

Regarding RAM refresh I read that the 41256 chips have 8 rows and the gate array refreshes 8 rows. The c't 512KB extension is replacing the 4164 chips with 41256 and mentions this and there is also a thread somewhere here, where Gerald identified the mapping of address lines to RAS and CAS, which made me think that this should work for 256KB SIMMs if they are using 41256 chips. Does that make sense or did I understand something wrong?

TotO

Well... If the SIMM30 replace the internal extended RAM from the 6128, may be it is possible to only put the CPU data lines to it and use the internal refresh and multiplexed addresses. You have to try... About the missing A8 line, you will see next. (may be like done on the DK'Tronics expansion)
"You make one mistake in your life and the internet will never let you live it down" (Keith Goodyer)

SerErris

Quote from: eto on 11:00, 29 August 22
Quote from: TotO on 10:17, 29 August 22To make use of the full 256K you have to handle the DRAM refresh and the bank switching to access the extra memory. If your SIMM is on the CPU bus, you can use it. Only the GA bus require DI/DO to be separated.
So connect the 8 data input pins of the second ram bank to D1-D8 of the SIMM? No need to bother with the DI/DO stuff? That would make things easier.

Regarding RAM refresh I read that the 41256 chips have 8 rows and the gate array refreshes 8 rows. The c't 512KB extension is replacing the 4164 chips with 41256 and mentions this and there is also a thread somewhere here, where Gerald identified the mapping of address lines to RAS and CAS, which made me think that this should work for 256KB SIMMs if they are using 41256 chips. Does that make sense or did I understand something wrong?
You definitely need to put on DI and DO as both are getting connected in a different way (for the internal RAM). So this will rule out the SIM or you need to put in glue logic with another latch (that may break other things). The issue is that the DO are not connected to the CPU, but actually to a latch, that is then connected to the CPU. It is also directly connected to the GA. That is done for the GA to enable read from the RAM directly without the need of the CPU (video memory).

Even if the Video memory anyhow would only be able to read from the first 64k the logic did not change for the second 64k and they are connected to the same latch. Just GA+PLA configures which chips are actually doing output to the latch. 
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

TotO

Quote from: SerErris on 12:28, 12 September 22You definitely need to put on DI and DO as both are getting connected in a different way
The dk'tronics expansions are using DRAM with linked di/do because on the CPU bus. It is probably possible to do something close internaly as this memory do not require to be read by the GA.
"You make one mistake in your life and the internet will never let you live it down" (Keith Goodyer)

eto

Quote from: TotO on 18:48, 12 September 22
Quote from: SerErris on 12:28, 12 September 22You definitely need to put on DI and DO as both are getting connected in a different way
The dk'tronics expansions are using DRAM with linked di/do because on the CPU bus. It is probably possible to do something close internaly as this memory do not require to be read by the GA.
I already tried with the SIMM but it did not get any useful data. 

On the expansion port, a RAM expansion will also set RAMDIS, which disables the latch. When I do it internally, the latch will be active as I can't set RAMDIS. I couldn't measure the values on the data lines as I don't have an oscilloscope, but I would expect, that an open latch without data on the data out lines will interfere with the data on the DI lines. 

I will no focus on 41256 chips and try to use them. Once that works, I can revisit the SIMM. I have the idea that with some more logic, I can either put the data on the DI lines or force the latch to be inactive. 


TotO

Well... Adding a SIMM inside a CPC is already a hack, so you can take the signals you'll require. But sure, better to replace the IC. ;)
"You make one mistake in your life and the internet will never let you live it down" (Keith Goodyer)

eto

Quote from: SerErris on 12:28, 12 September 22Even if the Video memory anyhow would only be able to read from the first 64k the logic did not change for the second 64k and they are connected to the same latch. Just GA+PLA configures which chips are actually doing output to the latch. 
yes, indeed. 

The idea was, that DI lines are connected directly to the CPU bus, like the data lines on the expansion bus. Then, when RAM puts the data on the DI lines, the CPU should be able to read them. But I guess that could only work, if the latch is disabled, like it would be, if an external RAM expansion sets RAMDIS high.

WacKEDmaN

#12
Quote from: eto on 19:45, 12 September 22On the expansion port, a RAM expansion will also set RAMDIS, which disables the latch. When I do it internally, the latch will be active as I can't set RAMDIS. I couldn't measure the values on the data lines as I don't have an oscilloscope, but I would expect, that an open latch without data on the data out lines will interfere with the data on the DI lines.

you could use an arduino (or other mcu) as a logic analyser quite easily.. just poll the 8 pins connected to the data lines.. and have it display in arduinos IDEs serial plotter (or with the "Processing interface").. a logic analyser is better for this use case, as you can poll all the lines at the same time, where you can only do like 2 lines/channels on a typical oscilloscope (unless ya pay the big $!)
https://github.com/aster94/logic-analyzer

eto

So using the 41256 chips at their full capacity works now: CPC 6128 with 320KB internal RAM.

Still just a proof of concept of course. I need to buy some other ICs as the ones I had at hand are not really the best choice. 

TotO

Great! It remember me when I have prototyped the X-MEM, 10 years ago.
"You make one mistake in your life and the internet will never let you live it down" (Keith Goodyer)

Iridium+

Hmm, very interesting. 

Please, keep us updated 🙏🏻

eto

Quote from: Iridium+ on 18:49, 21 October 22Please, keep us updated 🙏🏻

I stopped with the SIMM as it requires a lot of logic and lots of soldering. But I have documented the (relatively simple) 320KB upgrade here:

https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/cpc-6128-internal-upgrade-to-320kb/





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