Gate Array (aka Amstrad 40010) schematics (http://www.octoate.de/wp/2016/09/21/gate-array-aka-amstrad-40010-schematics/?pk_campaign=feed&pk_kwd=gate-array-aka-amstrad-40010-schematics)
21 September 2016, 7:00 pmProbably you have read it on this page before: one of the main components of the Amstrad CPC, the Gate Array aka Amstrad 40010, was decapped and high resolution photos (http://www.octoate.de/wp/2016/04/18/gate-array-decapped/) were shot from the internals of this integrated circuit. Finally, Gerald found some time to reverse engineer the schematics of the Gate Array and released them (http://www.cpcwiki.eu/forum/amstrad-cpc-hardware/gate-array-decapped!/msg133284/#msg133284) in the CPCWiki forums. With the schematics it is possible to better understand what’s happening inside, find eventually existing hardware tricks / bugs and finally build a replacement of course.
Ash Evans has already “ported” the schematics to Verilog (http://www.cpcwiki.eu/forum/amstrad-cpc-hardware/gate-array-decapped!/msg133636/#msg133636), so it is possible to use it in your own CPLD or FPGA designs.
(http://www.octoate.de/wp/wp-content/uploads/2016/04/Amstrad-40010-612px-am2_metal-300x294.jpg)
Thanks a lot for your work to reverse engineer the last integrated circuit (for the classic Amstrad CPC), which can help us to preserve the Amstrad CPCs for the future :-)!
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Source: The Amstrad CPC news portal (http://www.octoate.de/wp)
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This news item first appeared on Octoate's Blog and was aggregated through RSS for the forum.