Release of Amstrad Cpc Crtc Compendium (and Amazing Demo Rev 2021)

[GUNHED]

Thanks for your continuing great work! 

[Bug Powell]

hello @Longshot i read you compendium but my english level is too low to understand it. do you plan to translate it in german  ?

also i asked some thing about your last demo called BSC 4, can you help me plaese man ?

[Bug Powell]

hello @Longshot again, as you don't do the answer, i guess you are translating the pompendium in german  ?
i see BSC like my previous post, are you the man who found the title of the logon demo?

[Prodatron]

Why are you claiming, that you are german?
Your english has nothing to do with a 1:1 stupid translation between english and german (e.g. "i am in the disappoint", which may be a primitive translation from another language, but very probably not from german).

[eto]

do you plan to translate it in german  ?

Longshot created the document in French and someone else is doing the English translation with the help of Google Translate and some (a lot of?) manual polishing. If you're keen to get a German translation you could do the same with a German translation of the document and provide the result to the community.

[SerErris]

I would use DeepL for that, which should be much better. 

Even the English version is hard to read as the translation from French created some strange sentences, that you would never say in english.

[SerErris]

You can use even ChatGPT for a translation as it understands context much better after you explained it.

This is the outcome of DeepL, which normally does a pretty good job, but fails here, the genders are wrong (as neither CRTS, nor GATE ARRAY are known to DeepL)
Auf dem AMSTRAD CPC beträgt die Dauer eines CRTC-Zeichens 1 µsec.
Dieses CRTC-Zeichen repräsentiert 2 Bytes im Speicher.
Der Speicherzeiger wird von der CRTC an das GATE ARRAY übermittelt, das immer den 64k "Zentralen Ram" lesen wird. Der GATE ARRAY kann keine Daten aus dem ROM oder RAM lesen, dem zusätzlichen RAM des 6128 (oder der Speichererweiterungen).
Die CRTC ist so programmiert, dass das so erzeugte Bild von einem Monitor unterstützt wird. Eine sprachliche Abkürzung besteht darin, den Begriff NOP anstelle von µsec (Mikrosekunde) zu verwenden, da dies die Zeit ist, die diese Anweisung in Z80A benötigt.
Auf dem CPC werden Z80A-Anweisungen ausgerichtet, indem die M-Zyklen einer Anweisung auf ein Vielfaches von 4 T-Zyklen aufgerundet werden. Diese Ausrichtung hängt damit zusammen, dass der GATE ARRAY die Z80A unterbrechen muss, um auf den Ram zuzugreifen, dessen Adresse von der CRTC geliefert wird. Diese Funktionsweise verlangsamt einige Befehle im Vergleich zur Taktfrequenz. Um einen genauen Code zu erstellen, müssen Sie die genaue Zeit kennen, die jede Anweisung benötigt. In Kapitel 25 auf Seite 270 finden Sie detaillierte Angaben zu den Zeiten für die einzelnen Befehle.

This is the outcome of Chapter 4 from ChatGPT (German):
Bei AMSTRAD CPC dauert ein CRTC-Zeichen 1 µs.
Dieses CRTC-Zeichen entspricht 2 Bytes im Speicher.
Der Speicherzeiger wird vom CRTC an das GATE ARRAY übermittelt, das immer den "Hauptspeicher" von 64k liest. Das GATE ARRAY kann keine Daten aus dem ROM oder dem zusätzlichen Speicher der 6128 (oder Speichererweiterungen) lesen.
Der CRTC ist so programmiert, dass das dadurch erstellte Bild von einem Monitor unterstützt wird. Eine sprachliche Abkürzung besteht darin, den Begriff NOP anstelle von µs (Mikrosekunde) zu verwenden, da dies die Zeit ist, die dieser Befehl im Z80A benötigt.
Auf dem CPC sind die Z80A-Befehle so ausgerichtet, dass die M-Zyklen eines Befehls auf ein Vielfaches von 4 T-Zyklen gerundet werden. Diese Ausrichtung ist auf die Notwendigkeit des GATE ARRAY zurückzuführen, den Z80A zu unterbrechen, um auf den Speicher zuzugreifen, dessen Adresse vom CRTC bereitgestellt wird. Dieser Betrieb verlangsamt bestimmte Befehle im Vergleich zur Taktfrequenz. Um präzisen Code zu erstellen, ist es erforderlich, die genaue Zeit zu kennen, die jede Befehl benötigt. Siehe Kapitel 25, Seite 270, für Details zu diesen Zeiten für jede Befehlsanweisung.

Looks much better and I only need to tell ChatGPT that the GateArray is neutral in German.

[SerErris]

A new version of the Compendium (v1.6, 284 pages) is available here:
http://logon.system.free.fr/down/ACCC1.6-EN.pdf
http://logon.system.free.fr/down/ACCC1.6-FR.pdf

(cannot edit my previous message to correct the link )

@Longshot if you are willing to share the word document with me, I will translate it to german.

Send me a PM if you are interested.

I do have the Rosetta stone to help me to understand the original French meaning, without speaking French. So a little bit of Latin + the bridge via the English translation will make it simpler. However without the word version (or whatever text version you have used, all the page numberings will get wrong as german is not the same length in wording than french or english.

[SerErris]

Wow,

chatGPT can actually translate whole pages .. so that should not take to long to do the job. 

[Bug Powell]

Why are you claiming, that you are german?
Your english has nothing to do with a 1:1 stupid translation between english and german (e.g. "i am in the disappoint", which may be a primitive translation from another language, but very probably not from german).

Ich benutze eigentlich keinen Übersetzer, um auf Englisch zu schreiben. Ist mein Englisch so schlecht? Entschuldigung dafür!

[Bug Powell]

Ich habe das Gefühl, dass @Longshot sehr verächtlich zu den Leuten ist. Ich habe höflich nach Infos über seine Demo und das Compendium gefragt, und er hat nie geantwortet. Denkt er, dass er mir überlegen ist?

@SerErris Ganz Deutschland wäre Ihnen sehr dankbar, wenn Sie es ins Deutsche übersetzen würden!

[Bug Powell]

So @Longshot ... Guten Tag?

[Longshot]

@SerErris: Thank you for your offer.

Marc (@Imimmfn) had worked to correct the English version.
He had spent time on version 1.2 and made some updates in version 1.3.
Since then, he has not been able to work on later versions.
Subsequently, my English version has probably regressed since version 1.3.

As @eto rightly states, I use Google Translate with a few small corrections.
What I have observed is that it is complicated to manage revisions between 2 translations when the gap between version numbers increases.
As such, I'm not sure it's a good idea to translate the Compendium into other languages, as this risks multiplying the problem of updating the document depending on everyone's availability; it would be better to improve the English version if it still has problems.

I think that Germans, in general, are more gifted than French people in English.
For example, in English, they naturally do not put a space before question marks, as a French person would.
Also, with the exception of the "clown" , it shouldn't pose too much of a problem for a German to use the English version.

Version 1.7 of the Compendium is available here:
https://shaker.logonsystem.eu/

[SerErris]

The problem is that the french version is something I cannot understand at all. So I can obviously read the english version, but also would do that service. And yes, you probably need to have a proper word document and enable versioning (track changes) in word to enable others to identify all the changes that potentially need updateing in the next version.

But to be honest, that should not be a  big issue. 

[SerErris]

@Longshot what is the original document format and can you release it as well?

[Longshot]

@SerErris
Marc is already revising version 1.7 in English with track changes enabled.
I do not want the original manuscript circulating or being modified by anyone else.
Thank you for your understanding.

[SerErris]

Hi @Longshot,

thank you again for all the work in the Compendium. It is a fantastic source of all kind of information but esp. about CRTCs and the GateArray and stuff.

After reading a bit, I stumbled over the english Version page 26, where it reads in Chapter 4.4.4:

A cycle M consists of several T cycles, some of which place a wait signal in the active state to indicate to another circuit that the Z80A agrees that it should be slowed down. This wait cycle is commonly named Tw. This is particularly the case for the instructions:

• OPCODE FETCH, during the 2nd cycle T.
• Reading or writing memory, during the 2nd cycle T.
• IO REQ, during the 3rd cycle T.

Actually that is wrong.
The CPU does NOT signal with the WAIT line that it is ready to accept a WAIT state from external components, it is a pure input line..
In the Tw cycle it actually accepts a WAIT from another external component, or you could say only at this Tw cycle it honors an active High signal and runns Wait cycles until this line getting low again.
The next part is the actually correct:

When the Z80A "performs" a cycle Tw, it looks at its Wait line (in this case that connected to the gate array) and if it is active, then it will generate another cycle TW.

It might be a translation issue, but It looks like the same in french as far as I can decipher it. 

So again, I do not think anything is wrong in the document, but this sentence in particular can be missunderstood. Oviously that is no documentation for hardware designers, but another forumlation might be more clear on this.

[Longshot]

Hello @SerErris

You are perfectly right.

It is of course the circuit connected to the Wait pin of the Z80A which sends a signal so that the Z80A takes it into account during its Tw cycles.

Thank you for this constructive feedback and I will of course correct the Compendium.

[SerErris]

A cycle M consists of several T cycles, some of which place a wait signal in the active state to indicate to another circuit that the Z80A agrees that it should be slowed down. This wait cycle is commonly named Tw. This is particularly the case for the instructions:

• OPCODE FETCH, during the 2nd cycle T.
• Reading or writing memory, during the 2nd cycle T.
• IO REQ, during the 3rd cycle T.

Checking this again, there seems to be also a mistake with T cycles.

A cycle M consists of several T cycles, that is correct. One of which is called Tw, where the CPU reacts to a signal on the WAIT input line. That we have discussed already.

But then the bullets are actually M cycles. It should read:
* Opcode Fetch, during the 2nd T-cycle of the first M cycle (M1)
* Reading, during 2nd T-cycle of second M cycle (M2)
* Writing, during 2nd T-cycle of 3rd M cycle (M3)

For IO operations, the CPU adds automatically a TW cycle, so that the read/write actually happens at the 4th T cycle which is T3 in nomenclature, but it is actually the fourth T-Cycle if you just count clocks.

It it is T1,T2,TW,T3 and @T3 the actuall read/write operation happens.
I am not 100% sure if that makes any difference, but would be correct.

Just saying. As I am creating a Memory Sniffer for debugging that is actually reading the CPC Bus and then starts reading everything into a memory block for later analysis of the running system, I needed to work with the timings of the CPU and when actually I can read the data from the bus, how long M1 is active etc. pp. 

This is for the Vortex Decrypting project, so that I can read the ROM from the actual running system. (e.g. see what the CPU sees, and recording it).

Please see timing diagrams attached from original Zylog product manual:
https://www.zilog.com/docs/z80/um0080.pdf

[zhulien]

Has the compendium been taken offline?