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Just been readin about the 8085

Started by ralferoo, 22:41, 21 February 13

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ralferoo

At the risk of TFM/FS wading in and starting another flamewar, I'll put this in bold and caps: I REALLY LIKE THE Z80, SO PLEASE DO NOT TAKE THIS AS A CRITICISM OF THE Z80. IT IS MERELY AN OBSERVATION ABOUT HOW ANOTHER PROCESSOR DOES THINGS DIFFERENTLY.

So, I was reading this blog the other day: Ken Shirriff's blog: Inside the ALU of the 8085 microprocessor and it got me to reading about the 8085, which I'd previously thought was "just" a 5V 8080 and hadn't thought much more about it. Then I discovered a list of undocumented 8085 opcodes when searching for more information about this undocumented flag (probably the clearest list is Electronic Error: Undocumented 8085 Instructions) and looking at how they overlapped with the Z80's extensions.

But what I found particularly interesting is how the undocumented instructions on the 8085 points the way to the direction Intel were moving with the 8086, which was already in design by that point even though it wasn't to be released until 2 years after the 8085.

In particular the undocumented instructions 28 [LDHI imm - DE=HL+imm] and 38 [LDSI imm - DE=SP+imm] coupled with LDAX/STAX D (or LD (DE),A in Z80 terms) and even more powerfully the undocumented D9 [SHLX - (DE)=L, (DE+1)=H] and ED [LHLX - L=(DE), H=(DE+1)] show that actually the 8085 shifts from HL being the most useful addressing register to DE being potentially the most useful, particularly for compiled code.

So, for instance the byte sequence 38 06 ED would fetch HL from (SP+6) and leave DE pointing at SP+6 ready for a subsequent store if required. This has obvious parallels with the future direction Intel went using BP to index variables stored on the stack and fetching 16-bit values even on an 8-bit bus system (e.g. the 8088).

Given that Intel claimed the 8085 was just a 5V version of the 8080, yet they devoted valuable silicon to making these very useful instructions, I can't help but think they deliberately withheld this information to make the jump to 8086/8088 more pronounced.

By way of comparison with Z80 (just to prove to TFM/FS that I know the Z80 is better), I didn't realise until this week that the 8080 didn't have relative jumps, hence the spaces for the undocumented 8085 instructions at 08,10,18,20,28,30,38.

MaV

Very interesting reading.

So in fictitious Z80 mnemonics the undocumented instructions would look like:

LDHI imm -> LD DE, (HL + dd)
LDSI imm -> LD DE, (SP + dd)
SHLX -> LD (DE), HL
LHLX -> LD HL, (DE)

These are powerful instructions. If I read that correctly, all these execute in 10 clock cycles.

Ken Shirrif's blog has some crazy stuff about the ALU and the undocumented flags K and V and how they are implemented on the chip, and casually explaining the super buffers which are the reason the 8085 has a minimum speed at which it needs to operate (while the Z80 doesn't have these buffers and there has no minimum speed limit.)

There's another intriguing undocumented instruction CB (RSTV) which executes an RST 8 when the V flag is set. From Ken's reasoning one can assume that the instruction has been undocumented because of the omission of the V flag in the future 8086 (and thus making the 8085 source-compatible).
Black Mesa Transit Announcement System:
"Work safe, work smart. Your future depends on it."

TFM

Quote from: ralferoo on 22:41, 21 February 13
At the risk of TFM/FS wading in and starting another flamewar...

Can somebody please stop this trolling!?! >:(
TFM of FutureSoft
Also visit the CPC and Plus users favorite OS: FutureOS - The Revolution on CPC6128 and 6128Plus

ralferoo

More really interesting stuff on the 8085, this time the register file which is probably implemented very similarly on the Z80: Ken Shirriff's blog: The 8085's register file reverse engineered

It explains the EX DE,HL trick which is almost certainly the same process as EXX on Z80 and similar to IX/IY too. Interestingly, the accumulator isn't stored along with the other registers, so presumably it lives closer to the ALU.

MaV

Wonderful stuff.

I have yet to read the link containing more details on the registers.

Perhaps there's a relation between the chip placement of the accumulator and its placement separate to the other registers in the octal table (the order is B, C, D, E, H, L, M, and A; M would be (HL) in Z80 mnemonics).

I'm enamored by Ken's octal table, btw, and am constructing a Z80 octal table at the moment, that will include separate tables for the prefix instructions. (will post when ready). The basic 1 byte instructions are almost all identical to the Z80's, except for the first column which on the Z80 contain the relative jumps, and the few bytes that contain the 8085's undocumented commands which are used as prefix bytes on the Z80.


But there's more in the discussion thread:
How to «open» microchip and what's inside? : ZeptoBARS
Part II: How to «open» microchip and what's inside? Z80, Multiclet, MSP430,

The second link contains a lot of "chip-pr0n". Unfortunately the Z80 pictures is a clone of East-Germany. Not that there's anything wrong with that, but I'd prefer the original.



Black Mesa Transit Announcement System:
"Work safe, work smart. Your future depends on it."

TFM

Quote from: ralferoo on 15:51, 06 March 13
... the accumulator isn't stored along with the other registers, so presumably it lives closer to the ALU.
Yes, they're neighbours, living at the same street. I saw them more often at that Irish Tavern close to Flags street.
TFM of FutureSoft
Also visit the CPC and Plus users favorite OS: FutureOS - The Revolution on CPC6128 and 6128Plus

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