Using extra 64KB of 6128

[Prodatron]

#C3 is mainly for ROM-based software, which want to read-access the video ram at #C000 directly (the reason why someone is so excited about it).
Using the same routines for doing video operations for both #4000 and #C000 maybe another usecase, but as you said, in this case you can't e.g. transfer sprite data from different secondary ram blocks to the video ram.

[andycadley]

The coolest CPC Banking feature is RAM configuration &C3. It's like &C1, but in addition it moves the upper 16 KB block of the main RAM (usually Video-RAM) from &C000-&FFFF to &4000-&7FFF. That's used by CP/M Plus, FutureOS and some cool demos too.

I can understand that C3 is the best mode to adapt a normal 64KB game to use double buffering on a 128KB machine as it requires  minimal change to the original code, but why is C3 a benefit for games that take real advantage of 128K memory and more? There I would have expected that C3 is even slower as it's impossible to copy anything from RAM4,RAM5 and RAM6 to RAM 1 directly.

There isn't really any combination that allows easy copying between RAM4/5/6 and RAM1. There is always going to be some compromises and carefully organising the memory map to fit your use case is crucial. The C1/C2/C3 configurations are often overlooked in favour of the "easier" methods that just page at #4000 though.

[GUNHED]

The coolest CPC Banking feature is RAM configuration &C3. It's like &C1, but in addition it moves the upper 16 KB block of the main RAM (usually Video-RAM) from &C000-&FFFF to &4000-&7FFF. That's used by CP/M Plus, FutureOS and some cool demos too.

I can understand that C3 is the best mode to adapt a normal 64KB game to use double buffering on a 128KB machine as it requires  minimal change to the original code, but why is C3 a benefit for games that take real advantage of 128K memory and more? There I would have expected that C3 is even slower as it's impossible to copy anything from RAM4,RAM5 and RAM6 to RAM 1 directly.

There isn't really any combination that allows easy copying between RAM4/5/6 and RAM1. There is always going to be some compromises and carefully organising the memory map to fit your use case is crucial. The C1/C2/C3 configurations are often overlooked in favour of the "easier" methods that just page at #4000 though.

Sure, als we can see in the post before yours. In addition people tend to forget the mode &C3 was introduced to allow CP/M Plus to run on 128 KB CPCs.

[eto]

people tend to forget the mode &C3 was introduced to allow CP/M Plus to run on 128 KB CPCs.

Could you please share where I can find that information? I can only find information on the Wiki and in a book that CP/M plus is using C2 and C0. C3 was nowhere mentioned. 

[Prodatron]

IIRC CP/M+ was using #C2 (for the 63K TPA) and #C1 for the "common area". And probably #C4-#C7 for managing/initialisation of the 2nd 64K bank.

Maybe the ROM-Part of Dr.Logo, which was placed in the second 8KB of the Amsdos ROM, was using #C3? But yes, that's not really CP/M(+) related, just another example that #C3 was designed for Rom software.
[this Dr.Logo for CP/M+ was a very strange oddity of Amstrad anyway: including a part of an alternative programming language in ROM, which still required booting another OS from disc + the remaining part of the programming language, and which wasn't used at all by most of the users ]

[d_kef]

people tend to forget the mode &C3 was introduced to allow CP/M Plus to run on 128 KB CPCs.

Could you please share where I can find that information? I can only find information on the Wiki and in a book that CP/M plus is using C2 and C0. C3 was nowhere mentioned.

In Chapter 8, Page 2 of the 6128 user manual you can read:
"There are three other bank selections possible (apart from the five shown below), but they are only useful to the implementation of CP/M Plus."

The drawing following the above statement clearly shows the use of memory modes #C0, #C4, #C5, #C6 and #C7. So the remaining 3 modes that are only useful to CP/M Plus are #C1 (not #C0), #C2, and #C3.

In fact memory modes #C1 to #C3 correspond to CP/M memory pages 0 to 2.

In "The Amstrad CP/M Plus" by David Powys-Lybbe & Andrew R M Clarke, page 433 you can read a detailed description of the usage of modes #C1 to #C3.
#C1 contains the banked portions of the BIOS and BDOS, the screen memory, disk buffers and the extended BIOS jumpblock.
#C2 is the TPA bank in which all application programs are run.
#C3 contains a copy of the CCP, disk hash tables and data buffers.

It is obvious that Amstrad designed memory modes #C1, #C2 and #C3 specifically for use with CP/M Plus so that the upper 16K of memory (block 7) is common to all 3. A prerequisite of the banked version of CP/M Plus.
They also designed almost identical memory configurations for the PCW and the Spectrum +3.

d_kef

[McArti0]

But when we have a 512KB RAM expansion, we will get an additional 112KB RAM in the C1(C3)+n*8 settings, where n=1-7. And full access to bank 1 and 3

[Prodatron]

#C3 contains a copy of the CCP, disk hash tables and data buffers.

Thanks, interesting, I still wonder why this is required, when you have #C4-#C7 anyway.

They also designed almost identical memory configurations for the PCW and the Spectrum +3.

The PCW has a flexible 4x16K memory mapping. I don't know of any alternative CPC-like mapping. Even in "CPC mode" it is using independant 4x16K pages. Maybe you mixed it?

Indeed the +2A/+3 memory mapping is using the same combinations like #C0-#C3:

Spectrum %00 -> same as -> CPC #C2
Spectrum %01 -> same as -> CPC #C0
Spectrum %10 -> same as -> CPC #C1
Spectrum %11 -> same as -> CPC #C3
(with blocks 0-3 and blocks 4-7 swapped).

Something like #C4-#C7 is missing on the Amstrad Spectrums.

[andycadley]

Thanks, interesting, I still wonder why this is required, when you have #C4-#C7 anyway.

Probably because the bulk of CP/M is running from page 7, so you need memory combinations that keep it located at #C000.

Indeed the +2A/+3 memory mapping is using the same combinations like #C0-#C3:

Spectrum %00 -> same as -> CPC #C2
Spectrum %01 -> same as -> CPC #C0
Spectrum %10 -> same as -> CPC #C1
Spectrum %11 -> same as -> CPC #C3
(with blocks 0-3 and blocks 4-7 swapped).

Something like #C4-#C7 is missing on the Amstrad Spectrums.

That's only the "all RAM" combinations. The paging system also allows any 16K page of the memory to be made visible at #C000 when the ROM is visible in the lower 16K.

[Prodatron]

That's only the "all RAM" combinations. The paging system also allows any 16K page of the memory to be made visible at #C000 when the ROM is visible in the lower 16K.

Yes, but then you can't have your own RSTs and interrupt handler, and 16K of visible RAM is missing 

[andycadley]

That's only the "all RAM" combinations. The paging system also allows any 16K page of the memory to be made visible at #C000 when the ROM is visible in the lower 16K.

Yes, but then you can't have your own RSTs and interrupt handler, and 16K of visible RAM is missing 

That's the Speccy way. 

Since the "all RAM" paging schemes only work on a subset of 128K machines (the +2A/+3), you're pretty much going to be using the more compatible RAM arrangements anyway and that means no RSTs and only 48K of visible RAM. Well unless you're targeting +3 disk only.

And then you have to deal with the messy way that contended (aka slow) RAM is different between the Sinclair and Amstrad models. And weird bugs when I is pointing at uncontended RAM.

Paging on the Amstrad is an absolute luxury in comparison. 

[GUNHED]

people tend to forget the mode &C3 was introduced to allow CP/M Plus to run on 128 KB CPCs.

Could you please share where I can find that information? I can only find information on the Wiki and in a book that CP/M plus is using C2 and C0. C3 was nowhere mentioned.

Well, it's common knowledge for me. You can look into Computer Journals, Google it or eventually use the Wiki. Sorry, I'm not the Silver Platter. My time is as precious as yours.

[GUNHED]

IIRC CP/M+ was using #C2 (for the 63K TPA) and #C1 for the "common area". And probably #C4-#C7 for managing/initialisation of the 2nd 64K bank.

Maybe the ROM-Part of Dr.Logo, which was placed in the second 8KB of the Amsdos ROM, was using #C3? But yes, that's not really CP/M(+) related, just another example that #C3 was designed for Rom software.
[this Dr.Logo for CP/M+ was a very strange oddity of Amstrad anyway: including a part of an alternative programming language in ROM, which still required booting another OS from disc + the remaining part of the programming language, and which wasn't used at all by most of the users ]

If CP/M Plus (Amstrad Version) would NOT require &C3, then it would run on CPC464 with RAM expansion. Later on CP/M Plus was patched to run on CPC464 too - by 3rd party developers. And before you ask: That's common knowledge, you can google it - Don't ask me for details, my time is as precious as yours.

[eto]

Well, it's common knowledge for me. You can look into Computer Journals, Google it or eventually use the Wiki. Sorry, I'm not the Silver Platter. My time is as precious as yours.

I searched Google, I checked the Wiki, I looked into the Markt&Technik book about CP/M and they all mention C2 but not C3. 

So it obviously isn't common knowledge as otherwise it would be present e.g. on the Wiki. 

But no worries, d_kef already answered.

[eto]

In "The Amstrad CP/M Plus" by David Powys-Lybbe & Andrew R M Clarke, page 433 you can read a detailed description of the usage of modes #C1 to #C3.
#C1 contains the banked portions of the BIOS and BDOS, the screen memory, disk buffers and the extended BIOS jumpblock.
#C2 is the TPA bank in which all application programs are run.
#C3 contains a copy of the CCP, disk hash tables and data buffers.

It is obvious that Amstrad designed memory modes #C1, #C2 and #C3 specifically for use with CP/M Plus so that the upper 16K of memory (block 7) is common to all 3. A prerequisite of the banked version of CP/M Plus.
They also designed almost identical memory configurations for the PCW and the Spectrum +3.

awesome. Thanks a lot.

[ZorrO]

Is it C3 work on normal 6128, or on Plus only?

[McArti0]

Is it C3 work on normal 6128, or on Plus only?

Normal 6128.

[GUNHED]

Well, it's common knowledge for me. You can look into Computer Journals, Google it or eventually use the Wiki. Sorry, I'm not the Silver Platter. My time is as precious as yours.

I searched Google, I checked the Wiki, I looked into the Markt&Technik book about CP/M and they all mention C2 but not C3.

So it obviously isn't common knowledge as otherwise it would be present e.g. on the Wiki.

But no worries, d_kef already answered.

Yes, the wiki sadly lacks a lot of basic information. Thanks to d_key - who gave a reference - it shall become common knowledge here too. 

[GUNHED]

Is it C3 work on normal 6128, or on Plus only?

CPC6128 and 6128plus natively. CPC464 and CPC664 with Revaldhinos RAM expansion (not the other ones though).

[d_kef]

The PCW has a flexible 4x16K memory mapping. I don't know of any alternative CPC-like mapping. Even in "CPC mode" it is using independant 4x16K pages. Maybe you mixed it?

I wasn't very clear on this.
The PCW has a flexible 4x16K memory mapping indeed. It can map any 16K memory page to any of the 4 16K memory banks of the Z80 (#0000-#3FFF, #4000-#7FFF, #8000-#BFFF, #C000-#FFFF)
What I meant is that the CP/M Plus memory configuration is very similar between the PCW and the CPC or the +3. I had the following tables in mind (I had to dig them out of my notes)

PCW

Z80 address space	CP/M Bank 0	CP/M Bank 1	CP/M Bank 2
#C000-#FFFF	RAM page 7 common	RAM page 7 common	RAM page 7 common
#8000-#BFFF	RAM page 3 BIOS,BDOS	RAM page 6 TPA	(RAM page 3)
#4000-#7FFF	RAM page 1 screen	RAM page 5 TPA	RAM page 8 CCP,hash tables, data buffers
#0000-#3FFF	RAM page 0 BIOS jumpblock	RAM page 4 TPA	(RAM page 0)

CPC

Z80 address space	CP/M Bank 0	CP/M Bank 1	CP/M Bank 2
#C000-#FFFF	RAM page 7 common	RAM page 7 common	RAM page 7 common
#8000-#BFFF	RAM page 2 BIOS,BDOS	RAM page 6 TPA	(RAM page 2)
#4000-#7FFF	RAM page 1 screen	RAM page 5 TPA	RAM page 3 CCP,hash tables, data buffers
#0000-#3FFF	RAM page 0 BIOS jumpblock	RAM page 4 TPA	(RAM page 0)

Spectrum +3

Z80 address space	CP/M Bank 0	CP/M Bank 1	CP/M Bank 2
#C000-#FFFF	RAM page 3 common	RAM page 3 common	RAM page 3 common
#8000-#BFFF	RAM page 6 BIOS,BDOS	RAM page 2 TPA	(RAM page 6)
#4000-#7FFF	RAM page 5 screen	RAM page 1 TPA	RAM page 7 CCP,hash tables, data buffers
#0000-#3FFF	RAM page 4 BIOS jumpblock	RAM page 0 TPA	(RAM page 4)

d_kef

[HAL6128]

IIRC CP/M+ was using #C2 (for the 63K TPA) and #C1 for the "common area". And probably #C4-#C7 for managing/initialisation of the 2nd 64K bank.

Maybe the ROM-Part of Dr.Logo, which was placed in the second 8KB of the Amsdos ROM, was using #C3? But yes, that's not really CP/M(+) related, just another example that #C3 was designed for Rom software.
[this Dr.Logo for CP/M+ was a very strange oddity of Amstrad anyway: including a part of an alternative programming language in ROM, which still required booting another OS from disc + the remaining part of the programming language, and which wasn't used at all by most of the users ]

Not sure about that but what I had in mind is that they had to do it due to a licence topic or copy protection. Will dig the info out somewhere...

[ervin]

Hi folks.

I've been thinking for some time about how best to start planning data storage to best make use of 128KB.
But I've realised that's not the hard bit.

I'm planning on using C0 to run the game, with main() at #8000, and other code and data from #100 to #3FFF.
I dunno... maybe that will change.

What I'm struggling to figure out is how to load data tables into banks 4 to 7.
Using C4 to C7 I can access data in banks 4 to 7, but I don't get how to get the data into those banks in the first place.

My z80 is not strong enough to write a game in 100% asm, but I'm very comfortable with cpctelera.
However, I'm wondering if it's possible to use a basic loader, and use OUT commands to change the current banking scheme, and then load a BIN file into the appropriate bank.

Does anyone have any ideas or tips or experiences that they could share?
Thanks!

[EDIT]

I've tried the following in BASIC after a fresh reboot:
out &7f00,&c0   OK
out &7f00,&c1   FREEZE
out &7f00,&c2   FREEZE
out &7f00,&c3   FREEZE
out &7f00,&c4   OK
out &7f00,&c5   OK
out &7f00,&c6   OK
out &7f00,&c7   OK

Now, I think I only need C4 to C7 (and then back to C0) during loading.
I'll need to try loading some stuff into those banks somehow... maybe poking data into memory locations?

[McArti0]

C1 and C3 is not freeze.

https://www.cpcwiki.eu/forum/index.php?msg=235879

You dont see printing chars because You are writing to the bank 7.

[ervin]

Oh, that's interesting.
I'll need to try some more tests.

Also, I tried some tests in BASIC (using C4 to C7), and they worked!

Code Select Expand

10 out &7f00,&c4
20 poke &4000,4
30 out &7f00,&c5
40 poke &4000,5
50 out &7f00,&c6
60 poke &4000,6
70 out &7f00,&c7
80 poke &4000,7

100 out &7f00,&c0
110 print peek(&4000)
120 out &7f00,&c4
130 print peek(&4000)
140 out &7f00,&c5
150 print peek(&4000)
160 out &7f00,&c6
170 print peek(&4000)
180 out &7f00,&c7
190 print peek(&4000)

200 out &7f00,&c0

[McArti0]

GENIUS!