PC compatible RTC chip
Usage in CPCs
Usage in SYMBiFACE II:Realtime clock:
Uses a Dallas DS1287A RTC chip, mapped to ports: FD14h SYMBiFACE II Real Time Clock - DS1287A RTC Data (R/W) FD15h SYMBiFACE II Real Time Clock - DS1287A RTC Index (W) RAM at [32h] is "attempted" to be used as century.
Usage in Dk'tronics Real Time Clock:
Uses a HD146818 chip. Details on I/O addresses are unknown. Unknown if century is supported.
Usage in Aleste 520EX - I/O Ports:
Uses a russian KR512WI1 chip (which is, according to the Aleste's Manual) compatible to western MC146818 chips. Connects to a 32.768kHz crystal. Connects to the PPI: PPI Port A.Bit0-7 = Data bus PPI Port C.Bit0 = Read/Write (0=Write, 1=Read) PPI Port C.Bit1 = Index Access (0=No, 1=Access) PPI Port C.Bit2 = Data Access (0=No, 1=Access) In the Aleste's Ext Port, the RTC must be enabled, and PSG and 8253 must be disabled. Unknown if century is supported.
00h Second (00..59) ;\ 01h Alarm second (00..59) ; these ten registers can be BCD or Binary 02h Minute (00..59) ; (see Control B, Bit2=DM) 03h Alarm minute (00..59) ; 04h Hour (00..23) ; ;\in 24hour mode: 05h Alarm hour (00..23) ; ;/bit7=PM 06h Day of week (01..07) ; 07h Day (01..31) ; 08h Month (01..12) ; 09h Year (00..99) ;/ 0Ah Control A 7 UIP Update in Progress (0=Stable in next 244us, 1=Time changes) (R) 6-4 DV Oscillator control (must be 2 for normal operation) 3-0 RS Rate Selector for IRQ pin (not used by SYMBiFACE II) 0Bh Control B 7 SET Stop clock, to be set/cleared before/after writing to [0h..9h] 6 PIE Periodic Interrupt Enable (see Control A, RS) 5 AIE Alarm Interrupt Enable 4 UIE Update-Ended Interrupt Enable (aka Seconds Interrupt) 3 SQWE Square-Wave Enable (see Control A, RS) 2 DM Data Mode for [00h..09h] (0=BCD, 1=Binary) 1 24H 24-Hour Mode (0=12h with AM/PM, 1=24h) 0 DSE Daylight Saving Enable (0=No, 1=Uses hardcoded timezone) 0Ch Control C (read-only, automatically reset to zero after reading) 7 IRQF Interrupt Request Flag (1 on PIE,AIE,UIE, 0 after read) (R) 6 PF Periodic Interrupt Flag (see Control A, RS) (R) 5 AF Alarm Interrupt Enable Flag (R) 4 UF Update-Ended Interrupt Flag (aka Seconds Interrupt) (R) 3-0 0 Reserved (zero) 0Dh Control D (read-only) 7 VRT Valid RAM and Time (1=Okay, 0=Battery Low) (R) 6-0 0 Reserved (zero) 0Eh..3Fh battery backed RAM (DS1287A, and other/newer chips) 40h..7Fh battery backed RAM (DS12887A, newer chip variants only) 80h..FFh reserved 32h battery backed RAM (commonly used as Century) (19..99) (see notes)
First of, whether or not the Century is stored at [32h] depends on software. PCs are conventionally using it like so. SYMBiFACE II seems to (try to) do the same. Whether the Aleste and Dk'tronics do store the century is unknown - and, if they should do, it might be anywhere at [32h] or elsewhere, in BCD or in binary... or even octal or ascii.
The "century" byte at [32h] is battery backed RAM in most chips (DS1287A, DS12887, DS12885, DS12887A), so software must manually adjust it when needed, and software can store BCD or binary or other values. However, during the year 2000 panic, two chips have been hastily produced (DS12C887, DS12C887A) which do automatically "destroy" this RAM location when the year wraps from 00 to 99, according to the datasheet, the destroyed value is then set to 20h (BCD twenty), and can be accessed only in BCD mode, and RAM at [32h] returns "N/A" in binary mode.
The DSE feature is crap, and should be disabled (it's using a hardcoded timezone, and thus works only in a few countries, and, it lacks a flag that indicates if daylight saving time is active or not).
SYMBiFACE II Cautions: Incorrectly claims to have 128 bytes battery backed RAM (but actually uses a DS1287A chip with 50 bytes battery backed RAM) (128 byte chips don't exist anyways, the maximum would be 114 bytes). The century is accidently referred to as millennium, it seems to be stored as BINARY value 19 or 20 (which may conflict with the Y2K-panic chips which are only "optimized" for destroying BCD values).