**Bit 13 of the status register is the S flag, which specifies whether the MC68000 is in supervisor mode or user mode.
**Bit 15 of the status register is the T flag, which specifies whether the MC68000 is in trace mode. After each instruction is executed in the trace mode, a trap is forced so that a debugging program can monitor the results of that instruction’s execution.
== Privilege Modes ==
The processor operates in one of two modes of privilege: the "Supervisor" mode or the "User" mode. The privilege mode determines:
* which instructions are legal
* select between the Supervisor Stack Pointer (SSP) and the User Stack Pointer (USP) in instruction references
* and may by used by an external Memory Management Unit (MMU) to control and translate memory accesses
== Instruction Set ==