== CPC Timings ==
On CPC, bus arbitration is done on every CPU bus access. On MSX, bus arbitration only applies to M1 machine cycles but access to VRAM has other limitations. On ZX Spectrum, bus arbitration is done not by using the /WAIT pin but by disabling the CPU clock when needed. On CPC, bus arbitration is done on every CPU bus access. The [[Gate Array]] makes the Z80 wait 3 out of every 4 cycles, effectively aligning all operations to a 4-tick cycle.
The NOPs column corresponds to CPC timings, which account for the bus arbitration managed by the [[Gate Array]]. The NOP instruction takes 4 cycles. This is the minimum amount of cycles an instruction can take.