Changes
Z80
,/* Instruction Execution Sequence */
#M2 (3 t-states): Operand fetch 42 (the displacement byte) then increment PC
#M3 (5 t-states): Operand fetch &16 (the real opcode) then increment PC, while calculating the address IX+42
#M4 (4 t-states): Memory read at address IX+42 and then RL operation
#M5 (3 t-states): Memory write at address IX+42
