Changes
Z80
,/* Oddities */
* Although not mentioned in Zilog documentation, the Z80 CPU supports two types of reset: normal and special. A normal reset disables the maskable interrupt, selects interrupt mode 0, zeroes registers I & R and zeroes the program counter (PC). A special reset zeroes PC only. Furthermore, a hardware bug was discovered when the special reset occurs after a HALT instruction. [https://github.com/redcode/Z80/wiki/Z80-Special-Reset Source]
* Almost all Z80 inputs are sampled on a rising clock, but the /WAIT signal is sampled on a falling clock. [https://emulation.gametechwiki.com/index.php/Emulation_accuracy#Subcycle_accuracy Source]
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== Compared behaviour ==
* The 6502’s Decimal (BCD) mode automatically adjusts ADC and SBC results, while the Z80 requires a DAA instruction after each BCD addition and subtraction.
* The 6502 uses only one addressing mode per instruction, while the Z80 can combine two different addressing modes within a single instruction.
* The 6502 post-decrements on PHA and pre-increments on PLA, while the Z80 pre-decrements on PUSH and post-increments on POP.
* The 6502 saves flags automatically during interrupts; while the Z80 requires PUSH AF and POP AF.
* The 6502 only updates flags that are directly relevant to the operation's result. For example, EOR doesn't conceptually involve a carry, so the Carry flag is left untouched. On the Z80, XOR always clears the Carry flag to ensure a clean flag state.
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