Changes
Added information on citation issues
== Interrupt generation ==
* '''This section relies largely on a single source and is suspected of infringing copyright protected under the [https://creativecommons.org/licenses/by-nc-nd/4.0/legalcode CC BY-NC-ND 4.0 license].''' Readers are encouraged to refer directly to the original source material for accurate information.
** ''Original source material under copyright: [https://shaker.logonsystem.eu/ACCC1.8-EN.pdf The Amstrad CPC CRTC Compendium]''
** ''Author: Serge Querné (Longshot)''
Interrupts on the CPC are created by the Gate Array based on settings from the CRTC. The Gate Array has an internal counter R52 (the R is for Raster) that counts from 0 to 51, incrementing after each HSYNC signal.
== CSYNC signal ==
* '''This section relies largely on a single source and is suspected of infringing copyright protected under the [https://creativecommons.org/licenses/by-nc-nd/4.0/legalcode CC BY-NC-ND 4.0 license].''' Readers are encouraged to refer directly to the original source material for accurate information.
** ''Original source material under copyright: [https://shaker.logonsystem.eu/ACCC1.8-EN.pdf The Amstrad CPC CRTC Compendium]''
** ''Author: Serge Querné (Longshot)''
The HSYNC and VSYNC signals are received from the [[CRTC]]. These signals are then modified by the Gate Array to C-HSYNC and C-VSYNC and merged into a single CSYNC signal that will be sent to the display.
