Changes

|7-6||not used

|65-4||not usedPPI Port A usage|-|5||if * 0= PSG (Sound Chip; default, then AY is accessed when readas in CPC) (With PPI.Port C: BC1/write to 8255 port A, if BDIR)* 1 then real= Reserved (would access both PSG and 8253 together)* 2 = RTC (Real-time clock is accessed with read/write to 8255 port ATime Clock) (With PPI. When real-time clock is selected, bits 2..0 of PPI port Port C are used to define real-time clock operation. : Bit2=DS bit 2, Bit1=AS bit 1, Bit0=R/W bit 0. So combinations are 2, write address, 4 write data, 5 read data.)|-|4||Enable 8253 timer. Any I* 3 = 8254 (Baudrate/O write then accesses 8253 with data comming from 8255 port A. Bit Future Timer) (With address lines A0/and A1 of I/O port defines 8253 = registerselection)