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Changes - CPCWiki

Changes

Multiface II

8 bytes added, 12:44, 10 May 2017
/* Technical */
When the I/O write is detected, then specific locations in the MF2 RAM are updated immediately.
Gate-Array pen index write (7fxx with bit 7=0 and bit 6=0): 3fcf Gate-Array border colour write (7fxx with bit 7=0 and bit 6=1): 3fdf Gate-Array pen colour write (7fxx with bit 7=0 and bit 6=1): 3f90-3f9f (pens 0 to 15) Gate-Array mode write (7fxx with bit 7=1 and bit 6=0): 3fef PAL write (7fxx with bit 7=1 and bit 6=1): 3fff CRTC register select write (bcxx): 3cff CRTC register data (bdxx): 1db0-1dbf (only registers 0-15, others are ignored) 8255 Control port write (f7xx): 37ff
The value that is stored is the value written.
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