Of the 247 opcodes that use the prefix &CB, the block &CB &30 to &CB &37 is undocumented officially. These commands shift the operand register left and set its lowest bit to 1.
This is in contrast to SRL (Shift Right Logical), which shifts right and clears the highest bit. Some believe that this difference indicates why these opcodes are undocumented, feeling were supposed to be Shift Left Logical but that this result the setting of the lowest bit represents a bug in the Z80 and that the operation was supposed to be Shift Left Logical, which would thus ''clear'' claiming this is why the lowest bit after shiftingopcodes are undocumented. Others call the opcodes SLIA, for Shift Left Inverted Arithmetic.
Regardless of the story behind this operation, its effective result is ''register'' = (''register'' * 2) + 1, something that does have its uses and has been employed in various programming contexts for that reason.
If you want a way to do an actual Shift Left Logical, ''i.e.'' ''register'' = ''register'' * 2, first ensure the carry is clear, inserting an OR A or AND A to achieve this if necessary, and then do an RL ''register''.
<pre>CB30 SLL B
== DD and FD prefixes ==
The &DD/or &FD prefixes replace are documented as causing operations using the 16-bit register HL to instead work with either of the 16-bit indexing registers L, H IX or IY; if the operations access a memory location (''i.e.'' normally LD A,(HL with IXL), ''etc.''), the opcodes must additionally include an extra byte that specifies a signed displacement (-128 to +127) from IX/IYLIY. However, Zilog have not documented the fact that these prefixes also affect opcodes that usually refer to the 8-bit components of HL, ''i.e.'' H and L. Thus, one gains access to the additional registers IXH/, IXL, IYH , and IYL, for almost all commands that normally use H or L. It is even possible to do things like LD IXH,IXL (although you cannot combine IX/and IYin the same instruction, for obvious reasons). These registers can be useful in routines that must process and/or store a lot of numbers. Thankfully, they are not as slow as their 16-bit counterparts: whereas access to (IX+d) is usually slower by 3 NOPs than the equivalent operation upon (HL), using the 8-bit components is (like PUSH IX, ''etc.'') only 1 NOP slower, and this is only due to the need to parse the prefixing byte.
<pre>DB #DD:LD H,A -> LD IXH,A
DB #FD:LD B,L -> LD B,IYL
</pre>
Note: These registers are called LX, LY, HX , and HY in the by [[WinAPE ]]'s debugger, although its assembleruses the names given above.
== ED prefix ==
== Web links ==
*[http://www.robsymyquest.netnl/z80undocz80undocumented/z80-documented-v0.91.pdf "The Undocumented Z80 Documented" by Sean Young Version 0.91, 18th September, 2005] at [http://www.myquest.nl/z80undocumented/ Jan Wilmans' Website] *[{{BrokenLink|http://www.rawwgrimware.org/indexlib/exe/fetch.php?name=News&file=article&sid/documentations/devices/z80/z80.memptr.eng.txt|2017|01|22|21|32|33|text=2226 Short information about the internal "MEMPTR" 16bit register of the Z80 and its influence on the F-Register]}}
[[Category:Programming]]