Changes

Bit 0 of the vector will be 0. Bits 32..1 are generated by the ASIC based on the interrupt source (one of the DMA channels or raster interrupt). Bits 7..4 3 are defined by writing a value to the ASIC IVR register (at &6805 in the ASIC registers).

The This bug relates to has mostly been seen when using the raster interrupt. When a raster interrupt is acknowledged sometimes the vector will be 6 (for raster interrupt) or 4 (for dma channel 0 - the lowest priority interrupt).

* If the instruction at the time of For example, if DMA interrupts are not used and when a raster interrupt acknowledge is located in a memory region where A13=0 then acknowledged sometimes the bug happens. The bug is not dependent on RAM vector will be 6 (for raster interrupt) or ROM or I register value. The location of 4 (for dma channel 0 - the lowest priority interrupt handler code is also not important. The location of the instruction is important. The bug also doesn't with opcodes that don't use memory read/write or don't contain a memory read/write when fetching the opcode. Single byte instructions are fine including HALT. However, it is difficult to code in a way to workaround the issue in this way).

* If the instruction at the time of interrupt acknowledge is located in a memory region where A13=1 0 then the bug happens. The bug is not dependent on RAM or ROM or I register value. The location of the interrupt handler code is also not important. The location of the instruction is important. The bug also doesn't happenoccur with opcodes that don't use memory read/write or don't contain a memory read/write when fetching the opcode. Therefore Single byte instructions are fine including HALT. However, it is difficult to code in a way to workaround the issue put in this way. * If the instruction at the time of interrupt acknowledge is located in a memory region where A13=1 then the bug doesn't happen. * If auto-clear DMA interrupts are enabled (IVR bit 0=0), then the bug can also happen with the DMA interrupts. There are workarounds:* Put your code between &2000-&3fff, &6000-&7fff, &a000-&bfff, &e000-&ffff. You can place your I value anywhere and the code for your interrupt handlers can be anywhere.You can make use of RAM and ROM and cart to make this easier* Set all interrupt handlers to the same function, do not use auto-clear (DCSR bit 0 = 0) and handle it like IM 1. (For memory reasons IM 2 is often easier to use to control interrupts)