Changes
/* Weblinks */
The logic around the Z80 shortens or lengthens the IORQ based on A13 and that is why the bug doesn't happen when A13=1.
== Weblinks ==
*[https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/amstrad-plus-and-im2-bug/ Amstrad Plus and IM2 bug] [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/asic-im-2-vector/ ASIC IM2 vector] Related topics on CPCWiki forum
*[https://asmtradcpc.zilog.fr/docs/Interruptions_-_modes_et_fonctionnement.php Le bug des interruptions cpc+ (FR)]
*[http://quasar.cpcscene.net/doku.php?id=assem:asic#les_interruptions_de_l_asic Le bug DMA0 vs PRI (FR)]
[[Category:Hardware]]
