|ADD IY, BC||15||2||rowspan=4|--?- 0 *||FD 09||rowspan=4|Add (IY register)||rowspan=4|IY = IY + rr
|-
|ADD IY, DE||15||2||FD 19
|-
|ADD IY, IY||15||2||FD 29
|DAA||4||1||***P-*||27||Decimal Adjust Acc.||A=BCD format (dec.)
|- style="background:#efefef;"
|DEC A||4||1||rowspan=10|***V1-||3D||rowspan=10|Decrement (8-bit)||rowspan=107|s=s-1
|-
|DEC B||4||1||05
|DEC L||4||2||2D
|-
|DEC (HL)||11||1||35||(HL)=(HL)-1
|-
|DEC (IX+N)||23||3||DD 35 XX||rowspan=2|(xx-d)=(xx-d)+1
|-
|DEC (IY+N)||23||3||FD 35 XX
|IN L,(C)||12||2||ED 68
|- style="background:#efefef;"
|INC A||4||1||rowspan=710|***V0-||3C||rowspan=710|Increment (8-bit)||rowspan=7|r=r+1
|- style="background:#efefef;"
|INC B||4||1||04
|- style="background:#efefef;"
|INC L||4||1||2C
|-
|INC (HL)||11||1||34||(HL)=(HL)+1
|- style="background:#efefef;"
|INC (IX+N)||23||3||DD 34 XX||rowspan=2|(xx+d)=(xx+d)+1
|- style="background:#efefef;"
|INC (IY+N)||23||3||FD 34 XX
|-
|INC BC||6||1||rowspan=4|------||03||rowspan=4|Increment (16-bit)||rowspan=4|ss=ss+1
|- style="background:#efefef;"
|INC IY||10||2||FD 23
|-
|INC (HL)||11||1||***V0-||34||Increment (indirect)||(HL)=(HL)+1
|- style="background:#efefef;"
|INC (IX+N)||23||3||rowspan=2|***V0-||DD 34 XX||rowspan=2|Increment||rowspan=2|(xx+d)=(xx+d)+1
|- style="background:#efefef;"
|INC (IY+N)||23||3||FD 34 XX
|-
|IND||16||2||?*??1-||ED AA||Input and Decrement||(HL)=(C),HL=HL-1,B=B-1
|
|-
|CCF/SCF
|1
|1
|
|-
|JP (HL)
|1
|1
|
|-
|JP (IX/IY)
|2
|2
|RST 0/8/10h/18h/20h/28h/30h/38h
|4
|1
|
|-
|SCF
|1
|1
|
|}
NoteNotes:
*x=[0..7], d=[0..ff], m=[0..2], aa=[0..ffff], a=[0..ff]
* * Some exceptions exist
* All instructions containing (IX/IY+d) add 3µs and 2 bytes compared to their (HL) variants
* Contrarily to what the syntax of the instructions JP (HL/IX/IY) suggest, PC will be loaded with the contents of the register itself, not the indexed value. Those instructions should be understood as JP HL/IX/IY
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