Changes
/* Illegal instructions */
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| LXA (LAX) || || style="color: #CC0000;"|'''AB''' (2) || || || || || || || || || N || - || - || - || - || Z || - || (A OR magic) AND oper -> A -> X || Store * AND oper in A and X
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| NOP (DOP, TOP) || 1A, 3A, 5A,
| SBX (AXS, SAX) || || CB (2) || || || || || || || || || N || - || - || - || - || Z || C || (A AND X) - oper -> X || CMP and DEX at once, sets flags like CMP
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| SHA (AHX, AXA) || || || || || style="color: #CC0000;"|'''9F''' (5) || || || || || style="color: #CC0000;"|'''93''' (6) || - || - || - || - || - || - || - || A AND X AND (H+1) -> M || Stores A AND X AND (high-byte of addr. + 1) at addrunstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work (with the high-byte of the value used as the high-byte of the address)
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| SHS SHX (TASA11, SXA, XAS) || || || || || style="color: #CC0000;"|'''9B9E''' (5) || || || || || || - || - || - || - || - || - || - || A ∧ X → S, S ∧ AND (H + 1) → -> M || Transfer Accumulator "AND" Index Register Stores X to Stack Pointer then Store Stack Pointer "AND" Hi(high-Byte In Memorybyte of addr + 1) at addrunstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work
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| SHX SHY (SXASYA, XASSAY) || || || || || style="color: #CC0000;"|'''9E9C''' (5) || || || || || || || - || - || - || - || - || - || - || X ∧ Y AND (H + 1) → -> M || Store Index Register X "Stores Y AND" Value(high-byte of addr + 1) at addrunstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work
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| SHY SLO (SYA, SAYASO) || || || 0F (6) || style="color: #CC0000;"|'''9C''' 1F (57) || 1B (7) || 07 (5) || 17 (6) || || 03 (8) || 13 (8) || - N || - || - || - || - || - Z || - C || Y ∧ (H + 1) → M = C <- [76543210] <- 0, A OR M -> A || Store Index Register Y "AND" ValueASL oper + ORA oper
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| SLO SRE (ASOLSE) || || || 0F 4F (6) || 1F 5F (7) || 1B 5B (7) || 07 47 (5) || 17 57 (6) || || 03 43 (8) || 13 53 (8) || N || - || - || - || - || Z || C || M * 2 → M= 0 -> [76543210] -> C, A ∨ EOR M → -> A || Arithmetic Shift Left then "OR" Memory with AccumulatorLSR oper + EOR oper
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| SRE TAS (LSEXAS, SHS) || || || 4F (6) || 5F (7) || 5B (7) style="color: #CC0000;"|| 47 '''9B''' (5) || 57 (6) || || 43 (8) || 53 (8) || N || - || - || - || - || Z - || C - || M / 2 - || A ∧ X → MS, A ⊻ M S ∧ (H + 1) → A M || Logical Shift Right then "Exclusive OR" Memory with AccumulatorPuts A AND X in SP and stores A AND X AND (high-byte of addr + 1) at addrunstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work
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| USBC (SBC) || || EB (2) || || || || || || || || || N || V || - || - || - || Z || C || A - M - ~C -> A || SBC oper + NOP
