For example, the instruction RL (IX+42) will execute as follow:
#M1 (4 t-states): Prefix fetch &DDthen increment PC#M1 (4 t-states): Opcode fetch &CB (the second prefix)then increment PC#M2 (3 t-states): Operand fetch 42 (the displacement byte)then increment PC#M3 (5 t-states): Operand fetch &16 (the real opcode) and then increment PC, while calculating the address IX+42
#M4 (4 t-states): Memory read at address IX+42 and then operation
#M5 (3 t-states): Memory write at address IX+42