The [[GBZ80]] (Sharp SM83) that powers the original [[Nintendo GameBoy]] is an in-between the [[Intel 8080]] and Z80. [https://gbdev.io/resources.html Awesome Gameboy resources] [https://gbdev.gg8.se/wiki/ GBDev wiki] [https://emudev.de/ Emudev (q00.gb)]
* The Nintendo documentation does not mention M-cycles or T-states at all. They only mention CPU cycles, which are always equal to 4 T-states (this is the equivalent of like NOPs in the CPC world). Also, the GBZ80 has different timings than the Z80. For example, CALL nn takes 6 cycles on the GBZ80, but only 5 NOPs on the Z80. [https://archive.org/details/GameBoyProgManVer1.1/ Gameboy programming manual]
* The GBZ80 lacks the alternate register set, the dedicated I/O bus, the R register, the index registers (thus no DD and FD prefixed opcodes), the ED prefixed opcodes (including block transfer), the sign and parity/overflow flags (and all conditional instructions that used them), the undocumented flags (thus no leaking of WZ and Q internal registers). [https://www.pastraiser.com/cpu/gameboy/gameboy_opcodes.html GBZ80 opcodes]