[[File:Intel 8080 open-closed.jpg|thumb|right|Intel 8080]]
[[File:KL Intel C8008-1.jpg|thumb|right|Intel 8008]]
The '''Intel 8080''' is a seminal CPU introduced in 1974 that gave rise to the personal computer/home computer/microcomputer revolution.
==History==
The 8080 is often said to be the "first truly usable microprocessor". This CPU is 10 times faster than its predecessor, the [[Intel 8008]] issued in 1972.
Its predecessor was the first 8-bit microprocessor, the [[Intel The 8008]]. It had, among other limitations, a rigid seven-level address call stack instead of a flexible Stack Pointer. The 8008 instruction set was itself based on the CPU board, built out of dozens of TTL chips, of the Datapoint 2200 computer. [https://www.righto.com/2023/08/datapoint-to-8086.html Source]
Despite what their naming suggest, the Intel 8008 and [[Intel 4004]] were separate projects with distinct architectures and purposes. The 8008 was not an upgrade or evolution of the 4004. The die shot of the 4004 reveals the initials FF of the chip designer, Federico Faggin. The die shot of the 8008 reveals the initials HF of the chip designer, Hal Feeney.
* bit1 - 1 (Fixed)
* bit0 - CF - Carry Flag
|| AC HF is used for BCD arithmetic (DAA instruction).
The accumulator and the flags together are called the PSW, or program status word.
A full instruction cycle requires anywhere from 4 to 18 states for its completion, depending on the kind of instruction involved.
{| class="wikitable"|+ T-state Definitions|-! T-state !! Description|-| T1| A memory address or I/O device number is placed on the Address Bus (A<sub>15-0</sub>); status information is placed on Data Bus (D<sub>7-0</sub>).|-| T2| The CPU samples the READY and HOLD inputs and checks for halt instruction.|-| TW (optional)| Processor enters wait state if READY is low or if HALT instruction has been executed.|-| T3| An instruction byte (FETCH machine cycle), data byte (MEMORY READ, STACK READ) or interrupt instruction (INTERRUPT machine cycle) is input to the CPU from the Data Bus; or a data byte (MEMORY WRITE, STACK WRITE or OUTPUT machine cycle) is output onto the data bus.|-| T4, T5 (optional) | States T4 and T5 are available if the execution of a particular instruction requires them; if not, the CPU may skip one or both of them. T4 and T5 are only used for internal processor operations.|} See this [[Media:Intel 8080 details.pdf|Intel 8080 document]], containing a detailed breakdown of machine M-cycles and T-states.
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