Clock sequence using '''counter plugged with a clock''' was in fact out of law (but running fine in my first versions of FPGAmstrad as I'm a good blind developer), because output are not under clock constraint : just think about that a "not" component added just after a clock wire is out of -time constraints- law... destroying "time constraint" solver (the one telling you when your code is bad (can be better))
=== Clock sequence ===
=== How to tickle JavaCPC ===