Changes
/* On MiST version */
The SDRAM patched in order to write RAM under ROM is not implemented in VRAM mirror. Behaviour to check. => light version, with fix RAM 0 1 2 3 and quicker address solving does exactly the same, so the bug isn't by here.
VRAM mirror is something new since NEXYS2 to NEXYS4 so it seems a good way. => DISP signal not crossed correctly with crtc_W / bvram_W ? crtc scanner offset jumps problem ?=> checked ok...
Can look after a old NEXYS4 version, perhaps the first ones doesn't has "internal mirror VRAM", but a clk sequencer in external RAM.
=> do try another VRAM double buffer bank.
Do check the VRAM write speed also : is still a screen written at 50/60Hz ? do check vertical_counter/horizontal_counter scan related to that.
