Changes
/* Common Features */
<font size="-2:>''Copyright Amstrad ©1990 plc''</font></center>
''Note: this is the original, unaltered document as circulated within Amstrad. It is not so much intended as a reference for Plus developers, since it contains certain errors. If you want to read a version that has been corrected at least at some points (thanks to Executioner), please go to [[Arnold_V_Specs_Revised]]''
''For more unaltered (read-only) txt/htm versions, see [[Original Arnold V Specs]]. The cpcwiki page that you are currently viewing seems to be based on the original RTF version, as indicated by the characterstically distorted printer pin-out table.''
==PRODUCT RANGE OVERVIEW==
The old CPC6128 keyboard is used, except that the colour scheme has been changed and the connecting cable exits in a different location.
NOTE: gerald (on the forums) has confirmed a fault in the ASIC when used with external memory expansions. If a page of an external memory expansion is activated in the range &4000-&7fff and the asic ram page is active and a write is done, the write will go to the asic ram AND to the external memory expansion. This bug is NOT seen when the extra 64KB inside the 6128Plus is active when the asic ram page is active. It is advised that you set the configuration to &7fc0 before accessing the asic ram.
===Amstrad 464 Plus===
===Interrupt service (Vectored interrupts)===
The ASIC can produce interrupts from four sources: the raster interrupt and the three sound generator "DMA" channels. The ASIC will always supply a vector which can be used by the CPU in interrupt modes 0 and 2 or ignored in interrupt mode 1.
Thus interrupt service software in an environment where DMA interrupts are used must inspect these bits, giving highest priority to the raster interrupt, because this interrupt is always cleared automatically.
Failure to observe this requirement may result in raster interrupts being missed. Software which uses DMA interrupts from expansion cards must always use Z80 non-vectored interrupt mode be acknowledged by writing a "1, because " to the expansion bus does not support vectored interrupts. To summarize, vectored software should place a valid vector (D0 = 0) into the IVR. The hardware will supply a different vector for each interrupt source, and all interrupts are acknowledge automaticallyrelevant DCSR bit.
===Enhanced ROM cartridge support===
0-7 0-7
High Bank: Logical page (DFxxh) Physical page 1
0-127 (not disc page) 1
The two ROM disable bits in the existing mode and ROM enable register disable the ROM as before, wherever it is mapped, as does the ROMDIS signal from the expansion bus.
The "write through" mechanism, whereby writes to an area which is currently mapped as ROM actually write to the underlying RAM, still functions, wherever the ROM is mapped. However the write through mechanism cannot be used to access the register page. Write through also does not operate to the RAM from the register page.
===Analogue paddle ports===
[[Category:CPC Plus]]
[[Category:Hardware]][[Category:CPC Internal Components]]