== The Vectored Interrupt Bug ==
The Vectored interrupts are bugged. Amstrad knew about this and removed information about the IVR register and vectored interrupt from later ASIC specification documents.
NOTE: Vectored interrupts are buggedFollowing discussions on cpcwiki involving roudoudou, Longshot, gerald, arnoldemu and dragon the cause of the bug has been identified, through testing and from analysis by gerald with his logic analyzer and a workaround has been identified.
Following discussions on cpcwiki involving roudoudou, Longshot, gerald, arnoldemu and dragon, The bug relates to the raster interrupt. When a raster interrupt is acknowledged under some conditions (which are described below) the vector will be 6 (for raster interrupt) or 4 (for dma channel 0). it has been found that if the instruction which is being interrupted is located in a memory region where A13=1 (i.e. &2000-&3fff, &6000-&7fff, &a000-&cfff, &e000-&ffff) then the bug will not occur.
When the instruction is in a memory region where A13=0 then the vector will be seen to change between 6 and 4. This is related to if the CPU is performing a memory read/write.
