Difference between revisions of "RTC"

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(Created page with 'PC compatible RTC chips are used by: * SYMBiFACE II:Realtime clock * Dk'tronics Real Time Clock * Aleste 520EX - I/O Ports')
 
(RTC Registers)
 
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PC compatible RTC chips are used by:
+
Real Time Clock (RTC)
* [[SYMBiFACE II:Realtime clock]]
+
 
* [[Dk'tronics Real Time Clock]]
+
== PC compatible RTC chip ==
* [[Aleste 520EX - I/O Ports]]
+
=== Usage in CPCs ===
 +
 
 +
Usage in [[SYMBiFACE II:Realtime clock]]:
 +
  Uses a Dallas DS12887A RTC chip, mapped to ports:
 +
  FD14h SYMBiFACE II Real Time Clock - DS12887A RTC Data  (R/W)
 +
  FD15h SYMBiFACE II Real Time Clock - DS12887A RTC Index (W)
 +
 
 +
----
 +
 
 +
Usage in [[Dk'tronics Real Time Clock]]:
 +
  Uses a Z80 PIO chip to control the HD146818 RTC chip via port A. Do not use Port A as this will affect the RTC operation.
 +
  FBE0h  Dk'tronics Real Time Clock - Z80 PIO Port A Data (HD146818P RTC Data bus)
 +
  FBE1h  Dk'tronics Real Time Clock - Z80 PIO Port B Data, used for external control (General Purpose 8bit I/O Port)
 +
  FBE2h  Dk'tronics Real Time Clock - Z80 PIO Port A Control
 +
  FBE3h  Dk'tronics Real Time Clock - Z80 PIO Port B Control
 +
  FBE8h  Dk'tronics Real Time Clock - Control port for RTC chip (4bit latch) '''(details unknown)'''
 +
  Port B is connected directly to a standard 9-way connector on the left of the interface.
 +
 
 +
----
 +
 
 +
Usage in [[Aleste 520EX - I/O Ports]]:
 +
  Uses a russian KR512WI1 chip (which is, according to the Aleste's Manual) compatible to western MC146818 chips.
 +
  Connects to a 32.768kHz crystal.
 +
  Connects to the PPI:
 +
    PPI Port A.Bit0-7 = Data bus
 +
    PPI Port C.Bit0  = Read/Write  (0=Write, 1=Read)
 +
    PPI Port C.Bit1  = Index Access (0=No, 1=Access)
 +
    PPI Port C.Bit2  = Data Access  (0=No, 1=Access)
 +
  In the Aleste's Ext Port, the RTC must be enabled, and PSG and 8253 must be disabled.
 +
 
 +
=== RTC Registers ===
 +
 
 +
Registers 00H-09H in BCD mode:
 +
 
 +
{| class="wikitable" style="text-align:center;"
 +
|-
 +
! rowspan="2" | Register !! colspan="8" | Bit Position !! rowspan="2" | Function !! rowspan="2" | Range
 +
|-
 +
! 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0
 +
|-
 +
| 00H || 0 || colspan="3" | 10 Seconds || colspan="4" | Seconds || Seconds || 00–59
 +
|-
 +
| 01H || 0 || colspan="3" | 10 Seconds || colspan="4" | Seconds || Seconds Alarm || 00–59
 +
|-
 +
| 02H || 0 || colspan="3" | 10 Minutes || colspan="4" | Minutes || Minutes || 00–59
 +
|-
 +
| 03H || 0 || colspan="3" | 10 Minutes || colspan="4" | Minutes || Minutes Alarm || 00–59
 +
|-
 +
| rowspan="2" | 04H || AM/PM || rowspan="2" | 0 || 0 || 10 Hours || colspan="4" | Hours || rowspan="2" | Hours || 1–12 +AM/PM
 +
|-
 +
| 0 || colspan="2" | 10 Hours || colspan="4" | Hours || 00–23
 +
|-
 +
| rowspan="2" | 05H || AM/PM || rowspan="2" | 0 || 0 || 10 Hours || colspan="4" | Hours || rowspan="2" | Hours Alarm || 1–12 +AM/PM
 +
|-
 +
| 0 || colspan="2" | 10 Hours || colspan="4" | Hours || 00–23
 +
|-
 +
| 06H || 0 || 0 || 0 || 0 || 0 || colspan="3" | Day || Day || 01–07
 +
|-
 +
| 07H || 0 || 0 || colspan="2" | 10 Date || colspan="4" | Date || Date || 01–31
 +
|-
 +
| 08H || 0 || 0 || 0 || 10 Months || colspan="4" | Month || Month || 01–12
 +
|-
 +
| 09H || colspan="4" | 10 Years || colspan="4" | Year || Year || 00–99
 +
|}
 +
 
 +
Registers 00H-09H in binary mode:
 +
 
 +
{| class="wikitable" style="text-align:center;"
 +
|-
 +
! rowspan="2" | Register !! colspan="8" | Bit Position !! rowspan="2" | Function !! rowspan="2" | Range
 +
|-
 +
! 7 || 6 || 5 || 4 || 3 || 2 || 1 || 0
 +
|-
 +
| 00H || 0 || 0 || colspan="6" | Seconds || Seconds || 00–3B
 +
|-
 +
| 01H || 0 || 0 || colspan="6" | Seconds || Seconds Alarm || 00–3B
 +
|-
 +
| 02H || 0 || 0 || colspan="6" | Minutes || Minutes || 00–3B
 +
|-
 +
| 03H || 0 || 0 || colspan="6" | Minutes || Minutes Alarm || 00–3B
 +
|-
 +
| rowspan="2" | 04H || AM/PM || rowspan="2" | 0 || rowspan="2" | 0 || 0 || colspan="4" | Hours || rowspan="2" | Hours || 01–0C +AM/PM
 +
|-
 +
| 0 || colspan="5" | Hours || 00–17
 +
|-
 +
| rowspan="2" | 05H || AM/PM || rowspan="2" | 0 || rowspan="2" | 0 || 0 || colspan="4" | Hours || rowspan="2" | Hours Alarm || 01–0C +AM/PM
 +
|-
 +
| 0 || colspan="5" | Hours || 00–17
 +
|-
 +
| 06H || 0 || 0 || 0 || 0 || 0 || colspan="3" | Day || Day || 01–07
 +
|-
 +
| 07H || 0 || 0 || 0 || colspan="5" | Date || Date || 01–1F
 +
|-
 +
| 08H || 0 || 0 || 0 || 0 || colspan="4" | Month || Month || 01–0C
 +
|-
 +
| 09H || 0 || colspan="7" | Year || Year || 00–63
 +
|}
 +
 
 +
Control registers:
 +
  0Ah  Control A
 +
        7  UIP Update in Progress (0=Stable in next 244us, 1=Time changes) (R)
 +
        6-4 DV  Oscillator control (must be 2 for normal operation)
 +
        3-0 RS  Rate Selector for IRQ pin (not used by SYMBiFACE II)
 +
  0Bh  Control B
 +
        7  SET  Stop clock, to be set/cleared before/after writing to [0h..9h]
 +
        6  PIE  Periodic Interrupt Enable (see Control A, RS)
 +
        5  AIE  Alarm Interrupt Enable
 +
        4  UIE  Update-Ended Interrupt Enable (aka Seconds Interrupt)
 +
        3  SQWE Square-Wave Enable (see Control A, RS)
 +
        2  DM  Data Mode for [00h..09h] (0=BCD, 1=Binary)
 +
        1  24H  24-Hour Mode            (0=12h with AM/PM, 1=24h)
 +
        0  DSE  Daylight Saving Enable  (0=No, 1=Uses hardcoded timezone)
 +
  0Ch  Control C (read-only, automatically reset to zero after reading)
 +
        7  IRQF Interrupt Request Flag (1 on PIE,AIE,UIE, 0 after read) (R)
 +
        6  PF  Periodic Interrupt Flag    (see Control A, RS)        (R)
 +
        5  AF  Alarm Interrupt Enable Flag                            (R)
 +
        4  UF  Update-Ended Interrupt Flag (aka Seconds Interrupt)    (R)
 +
        3-0 0    Reserved (zero)
 +
  0Dh  Control D (read-only)
 +
        7  VRT  Valid RAM and Time (1=Okay, 0=Battery Low)              (R)
 +
        6-0 0    Reserved (zero)
 +
 
 +
Non-Volatile RAM:
 +
  0Eh..3Fh battery backed RAM (HD146818, DS1287A, DS12887A and other chips)
 +
  40h..7Fh battery backed RAM (only on DS12887A and newer chip variants)
 +
 
 +
== Other chips ==
 +
* [[ACU Real Time Clock (DIY)]]
 +
* [[Dobbertin Smart Watch]]
 +
* [[URTC-8 Universal RTC for Z80 computers]]
 +
* [[Nova]] (M48T35Y-70MH1F chip)
 +
 
 +
[[Category:Peripherals]]
 +
[[Category:Datasheet]]

Latest revision as of 11:33, 4 April 2025

Real Time Clock (RTC)

PC compatible RTC chip

Usage in CPCs

Usage in SYMBiFACE II:Realtime clock:

 Uses a Dallas DS12887A RTC chip, mapped to ports:
 FD14h SYMBiFACE II Real Time Clock - DS12887A RTC Data  (R/W)
 FD15h SYMBiFACE II Real Time Clock - DS12887A RTC Index (W)

Usage in Dk'tronics Real Time Clock:

 Uses a Z80 PIO chip to control the HD146818 RTC chip via port A. Do not use Port A as this will affect the RTC operation.
 FBE0h  Dk'tronics Real Time Clock - Z80 PIO Port A Data (HD146818P RTC Data bus)
 FBE1h  Dk'tronics Real Time Clock - Z80 PIO Port B Data, used for external control (General Purpose 8bit I/O Port)
 FBE2h  Dk'tronics Real Time Clock - Z80 PIO Port A Control
 FBE3h  Dk'tronics Real Time Clock - Z80 PIO Port B Control
 FBE8h  Dk'tronics Real Time Clock - Control port for RTC chip (4bit latch) (details unknown)
 Port B is connected directly to a standard 9-way connector on the left of the interface.

Usage in Aleste 520EX - I/O Ports:

 Uses a russian KR512WI1 chip (which is, according to the Aleste's Manual) compatible to western MC146818 chips. 
 Connects to a 32.768kHz crystal.
 Connects to the PPI:
   PPI Port A.Bit0-7 = Data bus
   PPI Port C.Bit0   = Read/Write   (0=Write, 1=Read)
   PPI Port C.Bit1   = Index Access (0=No, 1=Access)
   PPI Port C.Bit2   = Data Access  (0=No, 1=Access)
 In the Aleste's Ext Port, the RTC must be enabled, and PSG and 8253 must be disabled.

RTC Registers

Registers 00H-09H in BCD mode:

Register Bit Position Function Range
7 6 5 4 3 2 1 0
00H 0 10 Seconds Seconds Seconds 00–59
01H 0 10 Seconds Seconds Seconds Alarm 00–59
02H 0 10 Minutes Minutes Minutes 00–59
03H 0 10 Minutes Minutes Minutes Alarm 00–59
04H AM/PM 0 0 10 Hours Hours Hours 1–12 +AM/PM
0 10 Hours Hours 00–23
05H AM/PM 0 0 10 Hours Hours Hours Alarm 1–12 +AM/PM
0 10 Hours Hours 00–23
06H 0 0 0 0 0 Day Day 01–07
07H 0 0 10 Date Date Date 01–31
08H 0 0 0 10 Months Month Month 01–12
09H 10 Years Year Year 00–99

Registers 00H-09H in binary mode:

Register Bit Position Function Range
7 6 5 4 3 2 1 0
00H 0 0 Seconds Seconds 00–3B
01H 0 0 Seconds Seconds Alarm 00–3B
02H 0 0 Minutes Minutes 00–3B
03H 0 0 Minutes Minutes Alarm 00–3B
04H AM/PM 0 0 0 Hours Hours 01–0C +AM/PM
0 Hours 00–17
05H AM/PM 0 0 0 Hours Hours Alarm 01–0C +AM/PM
0 Hours 00–17
06H 0 0 0 0 0 Day Day 01–07
07H 0 0 0 Date Date 01–1F
08H 0 0 0 0 Month Month 01–0C
09H 0 Year Year 00–63

Control registers:

 0Ah  Control A
       7   UIP Update in Progress (0=Stable in next 244us, 1=Time changes) (R)
       6-4 DV  Oscillator control (must be 2 for normal operation)
       3-0 RS  Rate Selector for IRQ pin (not used by SYMBiFACE II)
 0Bh  Control B
       7   SET  Stop clock, to be set/cleared before/after writing to [0h..9h]
       6   PIE  Periodic Interrupt Enable (see Control A, RS)
       5   AIE  Alarm Interrupt Enable
       4   UIE  Update-Ended Interrupt Enable (aka Seconds Interrupt)
       3   SQWE Square-Wave Enable (see Control A, RS)
       2   DM   Data Mode for [00h..09h] (0=BCD, 1=Binary)
       1   24H  24-Hour Mode             (0=12h with AM/PM, 1=24h)
       0   DSE  Daylight Saving Enable   (0=No, 1=Uses hardcoded timezone)
 0Ch  Control C (read-only, automatically reset to zero after reading)
       7   IRQF Interrupt Request Flag (1 on PIE,AIE,UIE, 0 after read) (R)
       6   PF   Periodic Interrupt Flag     (see Control A, RS)         (R)
       5   AF   Alarm Interrupt Enable Flag                             (R)
       4   UF   Update-Ended Interrupt Flag (aka Seconds Interrupt)     (R)
       3-0 0    Reserved (zero)
 0Dh  Control D (read-only)
       7   VRT  Valid RAM and Time (1=Okay, 0=Battery Low)              (R)
       6-0 0    Reserved (zero)

Non-Volatile RAM:

 0Eh..3Fh battery backed RAM (HD146818, DS1287A, DS12887A and other chips)
 40h..7Fh battery backed RAM (only on DS12887A and newer chip variants)

Other chips