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FPGAmstrad

1,522 bytes added, 19:20, 19 July 2011
a lot of demos don't pass, in fact I didn't find one that pass dam.
'''Other bug Others bugs is about dsk format , in fact a dsk is uncompressed into RAM at startup, so all dsk access are direct :''' - ucpm format : normally it run, but in fact... it don't - protected format : all format with sector size changed, and then not standard didn't pass - double side format : you can change disk and then reboot to insert it, so it's not done for changing disk while you are playing - save : save is done in RAM, so when you turn off or reset Amstrad, all change is lost. It's done for let's games saving score running correctly
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Sniffing of real Amstrad, I listen on some wires of my Amstrad CPC 6128 plus, but I can't access to VSYNC/HSYNC output of CRTC, so I have to buy another model to do this test.
 
 
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== Agile method ==
 
 
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== Schematics ==
 
I explode into a task by component, so the schematics is big.
 
Starter kit use only one RAM physical component for RAM ROM and DSK, so I had to manage accesses (it is possible in fact because a Z80 is sequential processor)
 
My clock take 4 wires, in fact it exists a clock sequence (during 1 z80 tic, I do several think). Perhaps I have to explain a few about this point of view.
 
I don't know if I forget another thing by there....
 
RAM is done for being dump
 
 
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== Components ==
 
sound chip is fpgaarcade one, patched.
 
PPI chip is CPCWiki one, patched.
 
VGA display component use same parameters than unix '''modeline''' command
 
A component is dedicated to interrupt generation
 
Big components as SPI on BOOTLOAD use state-machine led debug : an integer contain the state of state machine, and this integer is displayed on 8 leds so you know where you are, it's for that I had several crash state in order to understand why and where component crash.
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