Changes

V9990

68 bytes removed, 14:16, 6 January 2019
/* LMMV */
==== LMMV ====
* LMMV seems to operate as if it is in bitmap mode all the time.
* SC comes from FC when applied to LOP.
* When DIX=0, then FC low then FC high are used to write pixels. The order is value restarts each row and FC high/low are not reversed when DIX=1directly related to VRAM like WM is.
e.g. When 8bpp, fc=&1234, DIX=0 and nx=4 then after LMMV has executed we will see the bytes in vram: &34,&12,&34,&12.
* When 8bpp mode, fc=&1234, DIX=1 and nx=4 , then after LMMB has executed we will see the bytes in vram: &12result is a bit strange,&34,&12,&34it depends on the DX value.* FC bits do not correspond directly In P1 mode, LMMV seems to physical VRAM but do match the pixels in each byte.e.g. operate as if x=0, 4bpp,fc=&1234 and nx=4 we will see in vram &34bitmap mode,&12. If x = 1, 4bpp, fc=&1234 however the value written to VRAM1 varies and nx=4 we will see in vram &x4,&32,&1x where 'x' it is the data that is already in vramnot known why yet.
Both All of these explain why it is best that FC is filled with the same data for each pixel.
==== ADVN ====
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