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PDS development system

585 bytes added, 13:16, 16 April 2010
/* Technical */
FBEE PDS [[Z80 PIO]] Port A Control
FBEF PDS [[Z80 PIO]] Port B Control
The handshake bits (in Port FBEDh) are:
0 clock from PC (data transferred on BOTH raising AND falling edges)
1-4 unknown (not connected in spectrum schematic)
5 unknown (something to and/or from PC in spectrum schematic) (could be IRQ)
6 data direction (for 74LS245 transceiver)
7 clock/acknowledge to PC (signals BOTH raising AND falling edges, too)
Note on data direction: This is feature duplicated in hardware, the Z80 PIO itself is bidirectional, so, theoritically, the external 74LS245 transceiver isn't required - it may be there to act as amplifier, or as fuse).
 
The '''CPC interface''' connects to Expansion Port, and contains a [[Z80 PIO]] chip, and 74LS245, 74LS04, 74LS32 logic chips, and a Reset button. And a 2x8pin connector, for connecting to PC via 16pin flat-cable.
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