Changes
/* Split Screen facility */
===Split Screen facility===
Three new memory mapped registers have been added within the ASIC, to provided provide a horizontally split screen facility. One at address 6801h defines the scan line after which the screen split occurs. A value of zero (as at power on reset) will turn this feature off.
The other register pair at 6802h and 6803h define the start address in memory to show for the split.
The screen can be split multiple times in a single frame by reprogramming 6801h, 6802 and 6803h.
The address takes the same form as R12 and R13 of the 6845 (e.g. &3000 being for the split to start at &c000). Any CRTC address can be used (the split may therefore scroll). 6802h is the high byte of the address and 6803h is the low byte of the address.
The full address that is displayed is defined by the soft scroll register, 6845's internal scan line counter and the programmed address.
The programmed address is stored when 6845's Horizontal counter matches Horizontal Displayed (R1) on the line programmed. It is then loaded into 6845's MA counter on the line after. Note that because the address is loaded into MA it effects the rest of the screen until the next time it is re-programmed or the display restarts.
It is then loaded into 6845's MA counter on the line after. Note that because the address is loaded into MA it effects the rest of the screen until the next time it is re-programmed or the display restarts.
Note that care should be taken with programming this facility such that the screen split does not alter the function of address bits A1-A8 and the dynamic memory refresh is not upset. This can be accomplished by setting the start of the second screen to lie on 16k boundary. The reason is that the dynamic memory refresh is derived from the memory address that the 6845 describes.
The split line is 8-bit only and has a range of 0-255 and will wrap around (255->0). A normal screen has 312 scanlines. This means that with some values, the counter will wrap and the split line will occur 2 times. With a normal screen of 312 scan lines, the value 312 - 257 = 55, or 37h should not be programmed, otherwise instead of seeing a split at line 55, you see a split at line 2. To avoid this (1) the vertical total adjust register is set to 1 while 6801h contains 37h (or some other value where the wrap will occur before the new frame starts), or (2) the raster interrupt (see 2.4 below) should be used such that 6801h contains 0 during vertical retrace so that it is disabled and doesn't wrap.
EDIT: A programmed value of 1 shows 2 lines before the split.The value is captured when HCC=R1 on line 1, and used on the next line. A programmed value of 0 turns off the split. Therefore the only way to have a single line then have a split to happen on the 2nd line is to allow ensure the counter to wrap around wraps by setting the value to 55 (normal screen) as mentioned above. EDIT: Screen split can occur during the first char line of vertical adjust (i.e. R5>0 and RC<=8) but not at any other time. i.e. RC>8). If R5 is set to 31, you can split during the first 8 lines only.
===Programmable raster interrupt===
